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[/] [openrisc/] [trunk/] [or1ksim/] [testsuite/] [or1ksim.tests/] [inst-set-test.cfg] - Rev 107
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/* inst-set.cfg -- Or1ksim instruction set configuration script fileCopyright (C) 2001, Marko Mlinar <markom@opencores.org>Copyright (C) 2010 Embecosm LimitedContributor Marko Mlinar <markom@opencores.org>Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>This file is part of OpenRISC 1000 Architectural Simulator.This program is free software; you can redistribute it and/or modify itunder the terms of the GNU General Public License as published by the FreeSoftware Foundation; either version 3 of the License, or (at your option)any later version.This program is distributed in the hope that it will be useful, but WITHOUTANY WARRANTY; without even the implied warranty of MERCHANTABILITY orFITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License formore details.You should have received a copy of the GNU General Public License alongwith this program. If not, see <http: www.gnu.org/licenses/>. *//* This configuration file is particularly intended for intruction set testswhich have a single block of RAM and make no use of the memory controlleror flash memory. */section memorytype = unknown /* Fastest */name = "RAM"baseaddr = 0x00000000size = 0x00200000delayr = 2delayw = 4endsection immuenabled = 0endsection dmmuenabled = 0endsection icenabled = 0endsection dcenabled = 0endsection cpuver = 0x12rev = 0x0001superscalar = 0hazards = 0dependstats = 0endsection bpbenabled = 0endsection debug/* enabled = 1rsp_enabled = 1rsp_port = 51000*/endsection simdebug = 0profile = 0prof_fn = "sim.profile"exe_log = 0exe_log_type = softwareexe_log_fn = "executed.log"endsection mcenabled = 0endsection dmaenabled = 0endsection ethernetenabled = 0endsection VAPIenabled = 0endsection fbenabled = 0endsection kbdenabled = 0end
