OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [or1ksim/] [testsuite/] [test-code-or1k/] [mc-ssram/] [Makefile.am] - Rev 235

Go to most recent revision | Compare with Previous | Blame | View Log

# Makefile.am for or1ksim testsuite CPU test program: mc-ssram

# Copyright (C) Embecosm Limited, 2010

# Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>

# This file is part of OpenRISC 1000 Architectural Simulator.

# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free
# Software Foundation; either version 3 of the License, or (at your option)
# any later version.

# This program is distributed in the hope that it will be useful, but WITHOUT
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
# more details.

# You should have received a copy of the GNU General Public License along
# with this program.  If not, see <http:#www.gnu.org/licenses/>.  */

# -----------------------------------------------------------------------------
# This code is commented throughout for use with Doxygen.
# -----------------------------------------------------------------------------


# A test of memory control of SSRAM
check_PROGRAMS    = mc-ssram

mc_ssram_SOURCES  = mc-ssram.c \
                    mc-ssram.h

mc_ssram_CPPFLAGS = -I$(srcdir)/../../../peripheral \
                    -I$(srcdir)/../../../cpu/common \
                    -I$(srcdir)/../../../cpu/or1k   \
                    -I$(srcdir)/../../../port

mc_ssram_LDFLAGS  = -T$(srcdir)/../except-mc.ld

mc_ssram_LDADD    = ../mc-common/except-mc.lo    \
                    ../mc-common/libmc-common.la \
                    ../support/libsupport.la

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.