OpenCores

URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [xilinx/] [ml501/] [rtl/] [verilog/] [gpio/] [README] - Rev 426

Go to most recent revision | Compare with Previous | Blame | View Log

GPIO RTL

This is a simple GPIO implementation. It is variable width, however widths of 
multiples of 8 are advised. The first width/8 bytes control are for 
reading/writing to the GPIO registers, the second set of width/8 bytes control 
the direction.

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.