URL
https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk
Subversion Repositories openrisc_me
[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [xilinx/] [ml501/] [rtl/] [verilog/] [gpio/] [README] - Rev 412
Compare with Previous | Blame | View Log
GPIO RTLThis is a simple GPIO implementation. It is variable width, however widths ofmultiples of 8 are advised. The first width/8 bytes control are forreading/writing to the GPIO registers, the second set of width/8 bytes controlthe direction.