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https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk
Subversion Repositories openrisc_2011-10-31
[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [xilinx/] [s3adsp1800/] [rtl/] [verilog/] [gpio/] [README] - Rev 568
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GPIO RTLThis is a simple GPIO implementation. It is variable width, however widths ofmultiples of 8 are advised. The first width/8 bytes control are forreading/writing to the GPIO registers, the second set of width/8 bytes controlthe direction.