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https://opencores.org/ocsvn/openrisc/openrisc/trunk
Subversion Repositories openrisc
[/] [openrisc/] [trunk/] [orpsocv2/] [rtl/] [verilog/] [i2c_master_slave/] [README] - Rev 544
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i2c master and slave
This core is based on the i2c master by Richard Herveille from OpenCores.org,
with added slave capability by ORSoC. See the driver software in sw/drivers
for details on use of the core.
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