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https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk
Subversion Repositories openrisc_2011-10-31
[/] [openrisc/] [trunk/] [orpsocv2/] [sw/] [Makefile.inc] - Rev 379
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######################################################################
#### ####
#### Common makefile for inclusion by others ####
#### ####
######################################################################
#### ####
#### Copyright (C) 2010 Authors and OPENCORES.ORG ####
#### ####
#### This source file may be used and distributed without ####
#### restriction provided that this copyright statement is not ####
#### removed from the file and that any derivative work contains ####
#### the original copyright notice and the associated disclaimer. ####
#### ####
#### This source file is free software; you can redistribute it ####
#### and/or modify it under the terms of the GNU Lesser General ####
#### Public License as published by the Free Software Foundation; ####
#### either version 2.1 of the License, or (at your option) any ####
#### later version. ####
#### ####
#### This source is distributed in the hope that it will be ####
#### useful, but WITHOUT ANY WARRANTY; without even the implied ####
#### warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ####
#### PURPOSE. See the GNU Lesser General Public License for more ####
#### details. ####
#### ####
#### You should have received a copy of the GNU Lesser General ####
#### Public License along with this source; if not, download it ####
#### from http://www.opencores.org/lgpl.shtml ####
#### ####
######################################################################
DESIGN_NAME=orpsoc
OR32_TOOL_PREFIX=or32-elf-
OR32_LD=$(OR32_TOOL_PREFIX)ld
OR32_AS=$(OR32_TOOL_PREFIX)as
OR32_CC=$(OR32_TOOL_PREFIX)gcc
OR32_AR=$(OR32_TOOL_PREFIX)ar
OR32_RANLIB=$(OR32_TOOL_PREFIX)ranlib
OR32_OBJDUMP=$(OR32_TOOL_PREFIX)objdump
OR32_OBJCOPY=$(OR32_TOOL_PREFIX)objcopy
VECTORS_OBJ ?=../support/crt0.o
SUPPORT_LIB ?=../support/$(DESIGN_NAME)_support.a
DESIGN_DEFINES_HEADER=../include/design-defines.h
SUPPORT_FILES ?=$(SUPPORT_LIB)
# Machine flags - uncomment one or create custom combination of flags
# All software div, mul and FPU
#MACH_FLAGS ?=-msoft-mul -msoft-div -msoft-float
# FPGA default - only hardware multiply
#MACH_FLAGS ?=-mhard-mul -msoft-div -msoft-float
# All hardware flags
#MARCH_FLAGS ?=-mhard-mul -mhard-div -mhard-float
# Hardware integer arith, soft float
MARCH_FLAGS ?=-mhard-mul -mhard-div -msoft-float
OR32_CFLAGS ?=-g -nostdlib -O2 -I../include $(MARCH_FLAGS)
OR32_LDFLAGS ?=-lgcc -T../support/or32.ld -e 256
# This path must be correct!
DESIGN_VERILOG_DEFINES=../../rtl/verilog/include/$(DESIGN_NAME)-defines.v
DESIGN_PROCESSED_VERILOG_DEFINES=../include/$(DESIGN_NAME)-defines.h
OR1200_VERILOG_DEFINES=../../rtl/verilog/include/or1200_defines.v
OR1200_PROCESSED_VERILOG_DEFINES=../include/or1200-defines.h
PROCESSED_DEFINES=$(DESIGN_PROCESSED_VERILOG_DEFINES) $(OR1200_PROCESSED_VERILOG_DEFINES)
ELF_DEPENDS+=$(VECTORS_OBJ) $(PROCESSED_DEFINES) $(SUPPORT_FILES)
# Set V=1 when calling make to enable verbose output
# mainly for debugging purposes.
ifeq ($(V), 1)
Q=
else
Q ?=@
endif
# Our local utilities
UTILS_BIN2HEX=../utils/bin2hex
$(UTILS_BIN2HEX):
$(Q)$(MAKE) -C ../utils bin2hex
UTILS_BIN2VMEM=../utils/bin2vmem
$(UTILS_BIN2VMEM):
$(Q)$(MAKE) -C ../utils bin2vmem
# Rule to generate C header file from Verilog file with `defines in it
$(DESIGN_PROCESSED_VERILOG_DEFINES): $(DESIGN_VERILOG_DEFINES)
$(Q)echo; echo "\t### Creating software defines header from verilog defines ###";
$(Q)echo "//This file is autogenerated from "$<" do not change!" > ../include/$@
$(Q)echo "#ifndef _"$(DESIGN_NAME)"_DEFINES_H_" >> ../include/$@
$(Q)echo "#define _"$(DESIGN_NAME)"_DEFINES_H_" >> ../include/$@
$(Q)cat $< | sed s://.*::g | sed 's/'\`'/'#'/g' >> ../include/$@
$(Q)echo "#endif" >> ../include/$@
$(Q)echo; echo >> ../include/$@
# This works (doesn't error), but for now we have to remove all of the numbers
# in verilog format, eg. 8'b0010_0000 or 32'h0000_0f00, or 32'd256 etc. as it's
# not so straight forward to convert these
$(OR1200_PROCESSED_VERILOG_DEFINES): $(OR1200_VERILOG_DEFINES)
$(Q)echo; echo "\t### Creating OR1200 software defines header from verilog defines ###";
$(Q)echo "//This file is autogenerated from "$<" do not change!" > ../include/$@
$(Q)echo "#ifndef _OR1200_DEFINES_H_" >> ../include/$@
$(Q)echo "#define _OR1200_DEFINES_H_" >> ../include/$@
$(Q)cat $< | sed s://.*::g | grep -v \'[dhb] | sed 's/'\`'/'#'/g' >> ../include/$@
$(Q)echo "#endif" >> ../include/$@
$(Q)echo; echo >> ../include/$@
# Default make
%.flashin: %.bin $(UTILS_BIN2HEX)
$(Q)$(UTILS_BIN2HEX) $< 1 -size_word > $@
%.vmem: %.bin $(UTILS_BIN2VMEM)
$(Q)$(UTILS_BIN2VMEM) $< > $@
%.elf: %.c $(ELF_DEPENDS)
$(Q)$(OR32_CC) $^ $(OR32_CFLAGS) $(OR32_LDFLAGS) -o $@
%.elf: %.S $(ELF_DEPENDS)
$(Q)$(OR32_CC) $^ $(OR32_CFLAGS) $(OR32_LDFLAGS) -o $@
%.o: %.S
$(Q)$(OR32_CC) $(OR32_CFLAGS) -c $< -o $@
%.o: %.c
$(Q)$(OR32_CC) $(OR32_CFLAGS) -c $< -o $@
# Recompile the support lib if we detect any of the drivers having changed
SUPPORT_LIB_SRCS=$(shell ls ../support/*.[cS])
SUPPORT_LIB_SRCS +=$(shell ls ../include/*.h)
$(SUPPORT_LIB): $(SUPPORT_LIB_SRCS)
$(Q)echo; echo "\t### Building software support library ###"; echo
$(Q)$(MAKE) -C ../support $(DESIGN_NAME)_support.a
$(VECTORS_OBJ):
$(Q)$(MAKE) -C ../support crt0.o
# This relies on the local clean rule of each makefile
clean-all: distclean
clean-support:
$(Q)$(MAKE) -C ../support clean
# List of software directories, exclude include/
SWDIRS=$(shell ls ../ | grep -v include)
distclean:
$(Q)for dir in $(SWDIRS); do if [ -d ../$$dir ]; then $(MAKE) -C ../$$dir clean; fi; done
$(Q)rm -f $(PROCESSED_DEFINES)
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