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<!-- Copyright (C) 2003 Red Hat, Inc. --> <!-- This material may be distributed only subject to the terms --> <!-- and conditions set forth in the Open Publication License, v1.0 --> <!-- or later (the latest version is presently available at --> <!-- http://www.opencontent.org/openpub/). --> <!-- Distribution of the work or derivative of the work in any --> <!-- standard (paper) book form is prohibited unless prior --> <!-- permission is obtained from the copyright holder. --> <HTML ><HEAD ><TITLE >CalmRISC/CalmRISC16 Samsung CalmRISC16 Core Evaluation Board </TITLE ><meta name="MSSmartTagsPreventParsing" content="TRUE"> <META NAME="GENERATOR" CONTENT="Modular DocBook HTML Stylesheet Version 1.76b+ "><LINK REL="HOME" TITLE="eCos Reference Manual" HREF="ecos-ref.html"><LINK REL="UP" TITLE="Installation and Testing" HREF="installation-and-testing.html"><LINK REL="PREVIOUS" TITLE="ARM/Xscale Intel IQ80321" HREF="iq80321.html"><LINK REL="NEXT" TITLE="CalmRISC/CalmRISC32 Samsung CalmRISC32 Core Evaluation Board " HREF="calmrisc32.html"></HEAD ><BODY CLASS="SECT1" BGCOLOR="#FFFFFF" TEXT="#000000" LINK="#0000FF" VLINK="#840084" ALINK="#0000FF" ><DIV CLASS="NAVHEADER" ><TABLE SUMMARY="Header navigation table" WIDTH="100%" BORDER="0" CELLPADDING="0" CELLSPACING="0" ><TR ><TH COLSPAN="3" ALIGN="center" >eCos Reference Manual</TH ></TR ><TR ><TD WIDTH="10%" ALIGN="left" VALIGN="bottom" ><A HREF="iq80321.html" ACCESSKEY="P" >Prev</A ></TD ><TD WIDTH="80%" ALIGN="center" VALIGN="bottom" >Chapter 5. Installation and Testing</TD ><TD WIDTH="10%" ALIGN="right" VALIGN="bottom" ><A HREF="calmrisc32.html" ACCESSKEY="N" >Next</A ></TD ></TR ></TABLE ><HR ALIGN="LEFT" WIDTH="100%"></DIV ><DIV CLASS="SECT1" ><H1 CLASS="SECT1" ><A NAME="CALMRISC16">CalmRISC/CalmRISC16 Samsung CalmRISC16 Core Evaluation Board</H1 ><DIV CLASS="SECT2" ><H2 CLASS="SECT2" ><A NAME="AEN6447">Overview</H2 ><P > The Samsung CalmRISC16 evaluation platform consists of two boards connected by a ribbon cable. One board contains the CPU core and memory. The other board is called the MDSChip board and provides the host interface. The calmRISC16 is a harvard architecture with separate 22-bit program and data addresses. The instruction set provides no instruction for writing to program memory. The MDSChip board firmware (called CalmBreaker) provides a pseudo register interface so that code running on the core has access to a serial channel and a mechanism to write to program memory. The serial channel is fixed at 57600-8-N-1 by the firmware. The CalmBreaker firmware also provides a serial protocol which allows a host to download a program and to start or stop the core board.</P ><P >The following RedBoot configurations are supported: <DIV CLASS="INFORMALTABLE" ><A NAME="AEN6457"><P ></P ><TABLE BORDER="1" CLASS="CALSTABLE" ><THEAD ><TR ><TH ALIGN="LEFT" VALIGN="TOP" >Configuration</TH ><TH ALIGN="LEFT" VALIGN="TOP" >Mode</TH ><TH ALIGN="LEFT" VALIGN="TOP" >Description</TH ><TH ALIGN="LEFT" VALIGN="TOP" >File</TH ></TR ></THEAD ><TBODY ><TR ><TD ALIGN="LEFT" VALIGN="TOP" >ROM</TD ><TD ALIGN="LEFT" VALIGN="TOP" >[ROM]</TD ><TD ALIGN="LEFT" VALIGN="TOP" >RedBoot running via the MDSChip board.</TD ><TD ALIGN="LEFT" VALIGN="TOP" >redboot_ROM.ecm</TD ></TR ></TBODY ></TABLE ><P ></P ></DIV ></P ></DIV ><DIV CLASS="SECT2" ><H2 CLASS="SECT2" ><A NAME="AEN6471">Initial Installation Method</H2 ><P >The CalmRISC16 core is controlled through the MDSChip board. There is no non-volatile storage available for RedBoot, so RedBoot must be downloaded to the board on every power cycle. A small utility program is used to download S-record files to the eval board. Sources and build instructions for this utility are located in the RedBoot sources in: <TT CLASS="FILENAME" >packages/hal/calmrisc16/ceb/current/support</TT ></P ><P >To download the RedBoot image, first press the reset button on the MDSChip board. The green 'Run' LED on the core board should go off. Now, use the utility to download the RedBoot image with: <TABLE BORDER="5" BGCOLOR="#E0E0F0" WIDTH="70%" ><TR ><TD ><PRE CLASS="SCREEN" >$ <TT CLASS="USERINPUT" ><B >calmbreaker -p /dev/term/b --reset --srec-code -f redboot.elf</B ></TT ></PRE ></TD ></TR ></TABLE > Note that the '-p /dev/term/b' specifies the serial port to use and will vary from system to system. The download will take about two minutes. After it finishes, start RedBoot with: <TABLE BORDER="5" BGCOLOR="#E0E0F0" WIDTH="70%" ><TR ><TD ><PRE CLASS="SCREEN" >$ <TT CLASS="USERINPUT" ><B >calmbreaker -p /dev/term/b --run</B ></TT ></PRE ></TD ></TR ></TABLE > The 'Run' LED on the core board should be on. Connecting to the MDSboard with a terminal and typing enter should result in RedBoot reprinting the command prompt.</P ></DIV ><DIV CLASS="SECT2" ><H2 CLASS="SECT2" ><A NAME="AEN6480">Special RedBoot Commands</H2 ><P >None.</P ></DIV ><DIV CLASS="SECT2" ><H2 CLASS="SECT2" ><A NAME="AEN6483">Special Note on Serial Channel</H2 ><P >The MDSChip board uses a relatively slow microcontroller to provide the pseudo-register interface to the core board. This pseudo-register interface provides access to the serial channel and write access to program memory. Those interfaces are slow and the serial channel is easily overrun by a fast host. For this reason, GDB must be told to limit the size of code download packets to avoid serial overrun. This is done with the following GDB command: <TABLE BORDER="5" BGCOLOR="#E0E0F0" WIDTH="70%" ><TR ><TD ><PRE CLASS="SCREEN" >(gdb) <TT CLASS="USERINPUT" ><B >set download-write-size 25</B ></TT ></PRE ></TD ></TR ></TABLE ></P ></DIV ><DIV CLASS="SECT2" ><H2 CLASS="SECT2" ><A NAME="AEN6488">Rebuilding RedBoot</H2 ><P >These shell variables provide the platform-specific information needed for building RedBoot according to the procedure described in <A HREF="rebuilding-redboot.html" >Chapter 3</A >: <TABLE BORDER="5" BGCOLOR="#E0E0F0" WIDTH="70%" ><TR ><TD ><PRE CLASS="PROGRAMLISTING" >export TARGET=calm16_ceb export ARCH_DIR=calmrisc16 export PLATFORM_DIR=ceb</PRE ></TD ></TR ></TABLE ></P ><P >The names of configuration files are listed above with the description of the associated modes.</P ></DIV ></DIV ><DIV CLASS="NAVFOOTER" ><HR ALIGN="LEFT" WIDTH="100%"><TABLE SUMMARY="Footer navigation table" WIDTH="100%" BORDER="0" CELLPADDING="0" CELLSPACING="0" ><TR ><TD WIDTH="33%" ALIGN="left" VALIGN="top" ><A HREF="iq80321.html" ACCESSKEY="P" >Prev</A ></TD ><TD WIDTH="34%" ALIGN="center" VALIGN="top" ><A HREF="ecos-ref.html" ACCESSKEY="H" >Home</A ></TD ><TD WIDTH="33%" ALIGN="right" VALIGN="top" ><A HREF="calmrisc32.html" ACCESSKEY="N" >Next</A ></TD ></TR ><TR ><TD WIDTH="33%" ALIGN="left" VALIGN="top" >ARM/Xscale Intel IQ80321</TD ><TD WIDTH="34%" ALIGN="center" VALIGN="top" ><A HREF="installation-and-testing.html" ACCESSKEY="U" >Up</A ></TD ><TD WIDTH="33%" ALIGN="right" VALIGN="top" >CalmRISC/CalmRISC32 Samsung CalmRISC32 Core Evaluation Board</TD ></TR ></TABLE ></DIV ></BODY ></HTML >
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