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><H1
CLASS="SECTION"
><A
NAME="HAL-ARCHITECTURE-CHARACTERIZATION">Architecture Characterization</H1
><P
>These are definition that are related to the basic architecture of the
CPU. These include the CPU context save format, context switching, bit
twiddling, breakpoints, stack sizes and address translation.</P
><P
>Most of these definition are found in
<TT
CLASS="FILENAME"
>cyg/hal/hal_arch.h</TT
>. This file is supplied by the
architecture HAL. If there are variant or platform specific
definitions then these will be found in
<TT
CLASS="FILENAME"
>cyg/hal/var_arch.h</TT
> or
<TT
CLASS="FILENAME"
>cyg/hal/plf_arch.h</TT
>. These files are include
automatically by this header, so need not be included explicitly.</P
><DIV
CLASS="SECTION"
><H2
CLASS="SECTION"
><A
NAME="AEN7787">Register Save Format</H2
><TABLE
BORDER="5"
BGCOLOR="#E0E0F0"
WIDTH="70%"
><TR
><TD
><PRE
CLASS="PROGRAMLISTING"
>typedef struct HAL_SavedRegisters
{
/* architecture-dependent list of registers to be saved */
} HAL_SavedRegisters;</PRE
></TD
></TR
></TABLE
><P
>This structure describes the layout of a saved machine state on the
stack. Such states are saved during thread context switches,
interrupts and exceptions. Different quantities of state may be saved
during each of these, but usually a thread context state is a subset
of the interrupt state which is itself a subset of an exception state.
For debugging purposes, the same structure is used for all three
purposes, but where these states are significantly different, this
structure may contain a union of the three states.</P
></DIV
><DIV
CLASS="SECTION"
><H2
CLASS="SECTION"
><A
NAME="AEN7791">Thread Context Initialization</H2
><TABLE
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><TR
><TD
><PRE
CLASS="PROGRAMLISTING"
>HAL_THREAD_INIT_CONTEXT( sp, arg, entry, id )</PRE
></TD
></TR
></TABLE
><P
>This macro initializes a thread's context so that
it may be switched to by <TT
CLASS="FUNCTION"
>HAL_THREAD_SWITCH_CONTEXT()</TT
>.
The arguments are:</P
><P
></P
><DIV
CLASS="VARIABLELIST"
><DL
><DT
>sp</DT
><DD
><P
> A location containing the current value of the thread's stack
pointer. This should be a variable or a structure field. The SP
value will be read out of here and an adjusted value written
back.
</P
></DD
><DT
>arg</DT
><DD
><P
> A value that is passed as the first argument to the entry
point function.
</P
></DD
><DT
>entry</DT
><DD
><P
> The address of an entry point function. This will be called
according the C calling conventions, and the value of
<TT
CLASS="PARAMETER"
><I
>arg</I
></TT
> will be passed as the first
argument. This function should have the following type signature
<TT
CLASS="FUNCTION"
>void entry(CYG_ADDRWORD arg)</TT
>.
</P
></DD
><DT
>id</DT
><DD
><P
> A thread id value. This is only used for debugging purposes,
it is ORed into the initialization pattern for unused registers
and may be used to help identify the thread from its register dump.
The least significant 16 bits of this value should be zero to allow
space for a register identifier.
</P
></DD
></DL
></DIV
></DIV
><DIV
CLASS="SECTION"
><H2
CLASS="SECTION"
><A
NAME="HAL-CONTEXT-SWITCH">Thread Context Switching</H2
><TABLE
BORDER="5"
BGCOLOR="#E0E0F0"
WIDTH="70%"
><TR
><TD
><PRE
CLASS="PROGRAMLISTING"
>HAL_THREAD_LOAD_CONTEXT( to )
HAL_THREAD_SWITCH_CONTEXT( from, to )</PRE
></TD
></TR
></TABLE
><P
>These macros implement the thread switch code. The arguments are:</P
><P
></P
><DIV
CLASS="VARIABLELIST"
><DL
><DT
>from</DT
><DD
><P
> A pointer to a location where the stack pointer of the current
thread will be stored.
</P
></DD
><DT
>to</DT
><DD
><P
> A pointer to a location from where the stack pointer of the next
thread will be read.
</P
></DD
></DL
></DIV
><P
>For <TT
CLASS="FUNCTION"
>HAL_THREAD_LOAD_CONTEXT()</TT
> the current CPU
state is discarded and the state of the destination thread is
loaded. This is only used once, to load the first thread when the
scheduler is started.</P
><P
>For <TT
CLASS="FUNCTION"
>HAL_THREAD_SWITCH_CONTEXT()</TT
> the state of the
current thread is saved onto its stack, using the current value of the
stack pointer, and the address of the saved state placed in
<TT
CLASS="PARAMETER"
><I
>*from</I
></TT
>. The value in
<TT
CLASS="PARAMETER"
><I
>*to</I
></TT
> is then read and the state of the new
thread is loaded from it.</P
><P
>While these two operations may be implemented with inline assembler,
they are normally implemented as calls to assembly code functions in
the HAL. There are two advantages to doing it this way. First, the
return link of the call provides a convenient PC value to be used in
the saved context. Second, the calling conventions mean that the
compiler will have already saved the caller-saved registers before the
call, so the HAL need only save the callee-saved registers.</P
><P
>The implementation of <TT
CLASS="FUNCTION"
>HAL_THREAD_SWITCH_CONTEXT()</TT
>
saves the current CPU state on the stack, including the current
interrupt state (or at least the register that contains it). For
debugging purposes it is useful to save the entire register set, but
for performance only the ABI-defined callee-saved registers need be
saved. If it is implemented, the option
<TT
CLASS="LITERAL"
>CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM</TT
> controls
how many registers are saved.</P
><P
>The implementation of <TT
CLASS="FUNCTION"
>HAL_THREAD_LOAD_CONTEXT()</TT
>
loads a thread context, destroying the current context. With a little
care this can be implemented by sharing code with
<TT
CLASS="FUNCTION"
>HAL_THREAD_SWITCH_CONTEXT()</TT
>. To load a thread
context simply requires the saved registers to be restored from the
stack and a jump or return made back to the saved PC.</P
><P
>Note that interrupts are not disabled during this process, any
interrupts that occur will be delivered onto the stack to which the
current CPU stack pointer points. Hence the stack pointer
should never be invalid, or loaded with a value that might cause the
saved state to become corrupted by an interrupt. However, the current
interrupt state is saved and restored as part of the thread
context. If a thread disables interrupts and does something to cause a
context switch, interrupts may be re-enabled on switching to another
thread. Interrupts will be disabled again when the or Go to most recent revision | Compare with Previous | Blame | View Log