URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
Subversion Repositories openrisc
[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [doc/] [html/] [user-guide/] [rt-arm-ep7211.html] - Rev 590
Go to most recent revision | Compare with Previous | Blame | View Log
<!-- Copyright (C) 2003 Red Hat, Inc. --> <!-- This material may be distributed only subject to the terms --> <!-- and conditions set forth in the Open Publication License, v1.0 --> <!-- or later (the latest version is presently available at --> <!-- http://www.opencontent.org/openpub/). --> <!-- Distribution of the work or derivative of the work in any --> <!-- standard (paper) book form is prohibited unless prior --> <!-- permission is obtained from the copyright holder. --> <HTML ><HEAD ><TITLE >Board: Cirrus Logic EDB7111-2 Development Board</TITLE ><meta name="MSSmartTagsPreventParsing" content="TRUE"> <META NAME="GENERATOR" CONTENT="Modular DocBook HTML Stylesheet Version 1.76b+ "><LINK REL="HOME" TITLE="eCos User Guide" HREF="ecos-user-guide.html"><LINK REL="UP" TITLE="Real-time characterization" HREF="real-time-characterization.html"><LINK REL="PREVIOUS" TITLE="Board: Intel StrongARM EBSA-285 Evaluation Board" HREF="rt-arm-ebsa285.html"><LINK REL="NEXT" TITLE="Board: ARM PID Evaluation Board" HREF="rt-arm-pid.html"></HEAD ><BODY CLASS="SECT1" BGCOLOR="#FFFFFF" TEXT="#000000" LINK="#0000FF" VLINK="#840084" ALINK="#0000FF" ><DIV CLASS="NAVHEADER" ><TABLE SUMMARY="Header navigation table" WIDTH="100%" BORDER="0" CELLPADDING="0" CELLSPACING="0" ><TR ><TH COLSPAN="3" ALIGN="center" >eCos User Guide</TH ></TR ><TR ><TD WIDTH="10%" ALIGN="left" VALIGN="bottom" ><A HREF="rt-arm-ebsa285.html" ACCESSKEY="P" >Prev</A ></TD ><TD WIDTH="80%" ALIGN="center" VALIGN="bottom" >Appendix B. Real-time characterization</TD ><TD WIDTH="10%" ALIGN="right" VALIGN="bottom" ><A HREF="rt-arm-pid.html" ACCESSKEY="N" >Next</A ></TD ></TR ></TABLE ><HR ALIGN="LEFT" WIDTH="100%"></DIV ><DIV CLASS="SECT1" ><H1 CLASS="SECT1" ><A NAME="RT-ARM-EP7211">Board: Cirrus Logic EDB7111-2 Development Board</H1 ><DIV CLASS="SECT2" ><H2 CLASS="SECT2" ><A NAME="AEN4500">CPU : Cirrus Logic EP7211 73MHz</H2 ><TABLE BORDER="5" BGCOLOR="#E0E0F0" WIDTH="70%" ><TR ><TD ><PRE CLASS="LITERALLAYOUT" >Board: Cirrus Logic EDB7111-2 Development Board CPU : Cirrus Logic EP7211 73MHz Startup, main stack : stack used 404 size 2400 Startup : Interrupt stack used 136 size 4096 Startup : Idlethread stack used 88 size 2048 eCos Kernel Timings Notes: all times are in microseconds (.000001) unless otherwise stated Reading the hardware clock takes 0 'ticks' overhead ... this value will be factored out of all other measurements Clock interrupt took 356.69 microseconds (182 raw clock ticks) Testing parameters: Clock samples: 32 Threads: 64 Thread switches: 128 Mutexes: 32 Mailboxes: 32 Semaphores: 32 Scheduler operations: 128 Counters: 32 Alarms: 32 Confidence Ave Min Max Var Ave Min Function ====== ====== ====== ====== ========== ======== 22.71 17.58 37.11 3.07 46% 34% Create thread 4.36 3.91 5.86 0.70 76% 76% Yield thread [all suspended] 4.24 3.91 7.81 0.56 84% 84% Suspend [suspended] thread 4.09 1.95 7.81 0.45 85% 3% Resume thread 5.31 3.91 11.72 0.92 65% 32% Set priority 2.11 1.95 3.91 0.28 92% 92% Get priority 11.54 9.77 25.39 0.99 62% 28% Kill [suspended] thread 4.46 3.91 9.77 0.82 75% 75% Yield [no other] thread 7.57 5.86 13.67 0.69 75% 20% Resume [suspended low prio] thread 3.94 1.95 5.86 0.18 92% 3% Resume [runnable low prio] thread 7.02 5.86 13.67 1.05 53% 45% Suspend [runnable] thread 4.42 3.91 9.77 0.79 76% 76% Yield [only low prio] thread 4.24 1.95 5.86 0.61 79% 1% Suspend [runnable->not runnable] 11.29 9.77 27.34 1.14 57% 37% Kill [runnable] thread 6.29 3.91 11.72 0.84 71% 4% Destroy [dead] thread 13.52 11.72 31.25 0.90 70% 25% Destroy [runnable] thread 24.50 21.48 42.97 1.69 79% 12% Resume [high priority] thread 8.79 7.81 19.53 1.05 99% 53% Thread switch 1.66 0.00 3.91 0.52 83% 15% Scheduler lock 2.59 1.95 3.91 0.86 67% 67% Scheduler unlock [0 threads] 2.62 1.95 3.91 0.88 65% 65% Scheduler unlock [1 suspended] 2.61 1.95 3.91 0.87 66% 66% Scheduler unlock [many suspended] 2.58 1.95 3.91 0.85 67% 67% Scheduler unlock [many low prio] 2.69 1.95 5.86 0.96 65% 65% Init mutex 4.88 3.91 9.77 1.10 96% 56% Lock [unlocked] mutex 4.64 3.91 11.72 1.05 71% 71% Unlock [locked] mutex 3.97 1.95 7.81 0.47 81% 9% Trylock [unlocked] mutex 3.48 1.95 3.91 0.67 78% 21% Trylock [locked] mutex 1.77 0.00 3.91 0.44 84% 12% Destroy mutex 31.92 29.30 42.97 1.65 71% 18% Unlock/Lock mutex 4.09 3.91 9.77 0.35 96% 96% Create mbox 1.83 0.00 3.91 0.34 87% 9% Peek [empty] mbox 5.31 3.91 9.77 0.96 62% 34% Put [first] mbox 1.59 0.00 1.95 0.60 81% 18% Peek [1 msg] mbox 5.19 3.91 9.77 1.04 56% 40% Put [second] mbox 1.65 0.00 3.91 0.62 78% 18% Peek [2 msgs] mbox 5.43 3.91 9.77 0.86 68% 28% Get [first] mbox 5.31 3.91 7.81 0.96 59% 34% Get [second] mbox 4.76 3.91 9.77 1.07 62% 62% Tryput [first] mbox 4.82 1.95 9.77 1.15 93% 3% Peek item [non-empty] mbox 5.55 3.91 11.72 0.82 71% 25% Tryget [non-empty] mbox 3.97 1.95 7.81 0.59 75% 12% Peek item [empty] mbox 4.33 3.91 7.81 0.69 81% 81% Tryget [empty] mbox 1.59 0.00 3.91 0.79 68% 25% Waiting to get mbox 1.71 0.00 3.91 0.53 81% 15% Waiting to put mbox 5.25 3.91 9.77 1.01 59% 37% Delete mbox 17.82 15.63 29.30 1.14 65% 18% Put/Get mbox 2.69 1.95 5.86 0.96 65% 65% Init semaphore 3.78 1.95 7.81 0.46 84% 12% Post [0] semaphore 4.27 3.91 7.81 0.62 84% 84% Wait [1] semaphore 3.72 1.95 7.81 0.66 75% 18% Trywait [0] semaphore 3.29 1.95 5.86 0.92 62% 34% Trywait [1] semaphore 2.32 1.95 3.91 0.59 81% 81% Peek semaphore 1.89 0.00 3.91 0.24 90% 6% Destroy semaphore 15.75 13.67 29.30 1.07 68% 21% Post/Wait semaphore 2.69 1.95 5.86 0.96 65% 65% Create counter 1.83 0.00 1.95 0.23 93% 6% Get counter value 1.53 0.00 3.91 0.76 71% 25% Set counter value 4.82 3.91 5.86 0.97 53% 53% Tick counter 1.89 0.00 1.95 0.12 96% 3% Delete counter 3.78 1.95 7.81 0.46 84% 12% Create alarm 7.99 5.86 15.63 0.70 81% 9% Initialize alarm 1.71 0.00 1.95 0.43 87% 12% Disable alarm 7.14 5.86 11.72 1.04 56% 40% Enable alarm 2.50 1.95 3.91 0.79 71% 71% Delete alarm 4.94 3.91 7.81 1.04 96% 50% Tick counter [1 alarm] 19.47 17.58 23.44 0.36 87% 9% Tick counter [many alarms] 7.63 5.86 11.72 0.55 81% 15% Tick & fire counter [1 alarm] 99.06 97.66 105.47 1.05 59% 37% Tick & fire counters [>1 together] 22.15 21.48 27.34 0.96 71% 71% Tick & fire counters [>1 separately] 359.16 357.42 378.91 0.87 71% 25% Alarm latency [0 threads] 364.03 357.42 402.34 3.03 58% 15% Alarm latency [2 threads] 408.25 402.34 416.02 2.89 53% 24% Alarm latency [many threads] 381.16 376.95 492.19 2.48 95% 46% Alarm -> thread resume latency 9.79 5.86 19.53 0.00 Clock/interrupt latency 12.13 5.86 31.25 0.00 Clock DSR latency 12 0 316 (main stack: 752) Thread stack used (1120 total) All done, main stack : stack used 752 size 2400 All done : Interrupt stack used 288 size 4096 All done : Idlethread stack used 276 size 2048 Timing complete - 30450 ms total PASS:<Basic timing OK> EXIT:<done> </PRE ></TD ></TR ></TABLE ></DIV ><DIV CLASS="SECT2" ><H2 CLASS="SECT2" ><A NAME="AEN4503">CPU : Cirrus Logic EP7212 73MHz</H2 ><TABLE BORDER="5" BGCOLOR="#E0E0F0" WIDTH="70%" ><TR ><TD ><PRE CLASS="LITERALLAYOUT" >Board: Cirrus Logic EDB7111-2 Development Board CPU : Cirrus Logic EP7212 73MHz Startup, main stack : stack used 404 size 2400 Startup : Interrupt stack used 136 size 4096 Startup : Idlethread stack used 88 size 2048 eCos Kernel Timings Notes: all times are in microseconds (.000001) unless otherwise stated Reading the hardware clock takes 0 'ticks' overhead ... this value will be factored out of all other measurements Clock interrupt took 356.32 microseconds (182 raw clock ticks) Testing parameters: Clock samples: 32 Threads: 64 Thread switches: 128 Mutexes: 32 Mailboxes: 32 Semaphores: 32 Scheduler operations: 128 Counters: 32 Alarms: 32 Confidence Ave Min Max Var Ave Min Function ====== ====== ====== ====== ========== ======== 22.43 15.63 33.20 3.02 68% 18% Create thread 4.48 3.91 5.86 0.81 70% 70% Yield thread [all suspended] 4.42 3.91 7.81 0.78 75% 75% Suspend [suspended] thread 4.12 1.95 5.86 0.49 82% 3% Resume thread 5.62 3.91 11.72 0.64 78% 18% Set priority 2.17 1.95 3.91 0.38 89% 89% Get priority 11.54 9.77 27.34 0.88 70% 25% Kill [suspended] thread 4.64 3.91 9.77 0.96 65% 65% Yield [no other] thread 7.51 5.86 15.63 0.72 76% 21% Resume [suspended low prio] thread 3.88 1.95 9.77 0.42 82% 10% Resume [runnable low prio] thread 7.14 5.86 13.67 1.00 59% 39% Suspend [runnable] thread 4.52 3.91 7.81 0.86 70% 70% Yield [only low prio] thread 4.15 1.95 7.81 0.49 85% 1% Suspend [runnable->not runnable] 11.26 9.77 27.34 1.17 56% 39% Kill [runnable] thread 6.22 3.91 13.67 0.88 70% 7% Destroy [dead] thread 13.64 11.72 33.20 1.02 64% 26% Destroy [runnable] thread 24.17 21.48 41.02 1.49 82% 12% Resume [high priority] thread 8.80 7.81 21.48 1.08 98% 54% Thread switch 1.60 0.00 1.95 0.58 82% 17% Scheduler lock 2.61 1.95 3.91 0.87 66% 66% Scheduler unlock [0 threads] 2.59 1.95 3.91 0.86 67% 67% Scheduler unlock [1 suspended] 2.61 1.95 3.91 0.87 66% 66% Scheduler unlock [many suspended] 2.59 1.95 3.91 0.86 67% 67% Scheduler unlock [many low prio] 2.62 1.95 3.91 0.88 65% 65% Init mutex 4.82 3.91 9.77 1.09 96% 59% Lock [unlocked] mutex 4.39 3.91 9.77 0.79 81% 81% Unlock [locked] mutex 3.84 1.95 7.81 0.36 87% 9% Trylock [unlocked] mutex 3.54 1.95 5.86 0.69 75% 21% Trylock [locked] mutex 1.83 0.00 3.91 0.34 87% 9% Destroy mutex 34.61 31.25 46.88 1.68 78% 9% Unlock/Lock mutex 3.97 1.95 7.81 0.24 93% 3% Create mbox 1.83 0.00 3.91 0.34 87% 9% Peek [empty] mbox 4.76 3.91 9.77 1.07 62% 62% Put [first] mbox 1.71 0.00 3.91 0.64 75% 18% Peek [1 msg] mbox 5.00 3.91 9.77 1.10 96% 50% Put [second] mbox 1.65 0.00 1.95 0.52 84% 15% Peek [2 msgs] mbox 5.31 3.91 11.72 1.05 59% 37% Get [first] mbox 5.13 3.91 7.81 0.99 56% 40% Get [second] mbox 4.76 3.91 11.72 1.12 96% 65% Tryput [first] mbox 4.46 3.91 7.81 0.82 75% 75% Peek item [non-empty] mbox 5.55 3.91 9.77 0.82 68% 25% Tryget [non-empty] mbox 4.03 1.95 7.81 0.58 78% 9% Peek item [empty] mbox 4.27 3.91 5.86 0.59 81% 81% Tryget [empty] mbox 1.77 0.00 3.91 0.44 84% 12% Waiting to get mbox 1.59 0.00 1.95 0.60 81% 18% Waiting to put mbox 5.37 3.91 9.77 0.91 65% 31% Delete mbox 16.66 13.67 27.34 1.42 90% 3% Put/Get mbox 2.62 1.95 5.86 0.92 68% 68% Init semaphore 3.84 1.95 7.81 0.47 81% 12% Post [0] semaphore 4.21 3.91 7.81 0.53 87% 87% Wait [1] semaphore 3.48 1.95 5.86 0.76 71% 25% Trywait [0] semaphore 3.60 1.95 5.86 0.62 78% 18% Trywait [1] semaphore 2.26 1.95 5.86 0.53 87% 87% Peek semaphore 1.89 0.00 1.95 0.12 96% 3% Destroy semaphore 16.05 13.67 29.30 1.40 59% 18% Post/Wait semaphore 2.38 1.95 3.91 0.67 78% 78% Create counter 2.01 0.00 3.91 0.35 84% 6% Get counter value 1.89 0.00 3.91 0.24 90% 6% Set counter value 4.58 3.91 5.86 0.88 65% 65% Tick counter 1.71 0.00 1.95 0.43 87% 12% Delete counter 3.84 1.95 7.81 0.36 87% 9% Create alarm 7.99 5.86 15.63 0.47 93% 3% Initialize alarm 2.01 0.00 3.91 0.35 84% 6% Disable alarm 6.53 5.86 13.67 1.01 75% 75% Enable alarm 2.32 1.95 3.91 0.59 81% 81% Delete alarm 4.76 3.91 7.81 1.01 59% 59% Tick counter [1 alarm] 19.53 17.58 23.44 0.24 90% 6% Tick counter [many alarms] 7.57 5.86 13.67 0.75 75% 21% Tick & fire counter [1 alarm] 98.57 97.66 105.47 1.14 96% 62% Tick & fire counters [>1 together] 22.15 21.48 27.34 0.96 71% 71% Tick & fire counters [>1 separately] 359.18 357.42 384.77 1.10 65% 31% Alarm latency [0 threads] 362.63 357.42 396.48 2.55 43% 27% Alarm latency [2 threads] 408.22 402.34 416.02 2.73 55% 21% Alarm latency [many threads] 378.63 375.00 494.14 2.56 93% 71% Alarm -> thread resume latency 9.78 5.86 19.53 0.00 Clock/interrupt latency 12.21 5.86 31.25 0.00 Clock DSR latency 12 0 316 (main stack: 752) Thread stack used (1120 total) All done, main stack : stack used 752 size 2400 All done : Interrupt stack used 288 size 4096 All done : Idlethread stack used 276 size 2048 Timing complete - 30550 ms total PASS:<Basic timing OK> EXIT:<done> </PRE ></TD ></TR ></TABLE ></DIV ></DIV ><DIV CLASS="NAVFOOTER" ><HR ALIGN="LEFT" WIDTH="100%"><TABLE SUMMARY="Footer navigation table" WIDTH="100%" BORDER="0" CELLPADDING="0" CELLSPACING="0" ><TR ><TD WIDTH="33%" ALIGN="left" VALIGN="top" ><A HREF="rt-arm-ebsa285.html" ACCESSKEY="P" >Prev</A ></TD ><TD WIDTH="34%" ALIGN="center" VALIGN="top" ><A HREF="ecos-user-guide.html" ACCESSKEY="H" >Home</A ></TD ><TD WIDTH="33%" ALIGN="right" VALIGN="top" ><A HREF="rt-arm-pid.html" ACCESSKEY="N" >Next</A ></TD ></TR ><TR ><TD WIDTH="33%" ALIGN="left" VALIGN="top" >Board: Intel StrongARM EBSA-285 Evaluation Board</TD ><TD WIDTH="34%" ALIGN="center" VALIGN="top" ><A HREF="real-time-characterization.html" ACCESSKEY="U" >Up</A ></TD ><TD WIDTH="33%" ALIGN="right" VALIGN="top" >Board: ARM PID Evaluation Board</TD ></TR ></TABLE ></DIV ></BODY ></HTML >
Go to most recent revision | Compare with Previous | Blame | View Log