URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
Subversion Repositories openrisc
[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [arm/] [e7t/] [v2_0/] [include/] [pkgconf/] [mlt_arm_e7t_ram.ldi] - Rev 631
Go to most recent revision | Compare with Previous | Blame | View Log
// eCos memory layout - Wed Apr 11 13:43:10 2001// This is a generated file - do not edit#include <cyg/infra/cyg_type.inc>MEMORY{ram : ORIGIN = 0, LENGTH = 0x80000}SECTIONS{SECTIONS_BEGINSECTION_fixed_vectors (ram, 0x20, LMA_EQ_VMA)SECTION_rom_vectors (ram, 0x10000, LMA_EQ_VMA)SECTION_text (ram, ALIGN (0x4), LMA_EQ_VMA)SECTION_fini (ram, ALIGN (0x4), LMA_EQ_VMA)SECTION_rodata (ram, ALIGN (0x4), LMA_EQ_VMA)SECTION_rodata1 (ram, ALIGN (0x4), LMA_EQ_VMA)SECTION_fixup (ram, ALIGN (0x4), LMA_EQ_VMA)SECTION_gcc_except_table (ram, ALIGN (0x4), LMA_EQ_VMA)SECTION_data (ram, ALIGN (0x4), LMA_EQ_VMA)SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA)CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);SECTIONS_END}
Go to most recent revision | Compare with Previous | Blame | View Log