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[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [arm/] [xscale/] [iq80310/] [v2_0/] [include/] [hal_platform_ints.h] - Rev 565
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#ifndef CYGONCE_HAL_PLATFORM_INTS_H #define CYGONCE_HAL_PLATFORM_INTS_H //========================================================================== // // hal_platform_ints.h // // HAL Interrupt and clock support // //========================================================================== //####ECOSGPLCOPYRIGHTBEGIN#### // ------------------------------------------- // This file is part of eCos, the Embedded Configurable Operating System. // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. // // eCos is free software; you can redistribute it and/or modify it under // the terms of the GNU General Public License as published by the Free // Software Foundation; either version 2 or (at your option) any later version. // // eCos is distributed in the hope that it will be useful, but WITHOUT ANY // WARRANTY; without even the implied warranty of MERCHANTABILITY or // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License // for more details. // // You should have received a copy of the GNU General Public License along // with eCos; if not, write to the Free Software Foundation, Inc., // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. // // As a special exception, if other files instantiate templates or use macros // or inline functions from this file, or you compile this file and link it // with other works to produce a work based on this file, this file does not // by itself cause the resulting work to be covered by the GNU General Public // License. However the source code for this file must still be made available // in accordance with section (3) of the GNU General Public License. // // This exception does not invalidate any other reasons why a work based on // this file might be covered by the GNU General Public License. // // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. // at http://sources.redhat.com/ecos/ecos-license/ // ------------------------------------------- //####ECOSGPLCOPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // // Author(s): msalter // Contributors: // Date: 2000-10-10 // Purpose: Define Interrupt support // Description: The interrupt details for the IQ80310 are defined here. // Usage: // #include <cyg/hal/hal_platform_ints.h> // ... // // //####DESCRIPTIONEND#### // //========================================================================== #define CYGNUM_HAL_INTERRUPT_TIMER 27 // external timer #define CYGNUM_HAL_INTERRUPT_ETHERNET 28 // onboard enet #define CYGNUM_HAL_INTERRUPT_SERIAL_A 29 // 16x50 uart A #define CYGNUM_HAL_INTERRUPT_SERIAL_B 30 // 16x50 uart B #define CYGNUM_HAL_INTERRUPT_PCI_S_INTD 31 // secondary PCI INTD // The hardware doesn't (yet?) provide masking or status for these // even though they can trigger cpu interrupts. ISRs will need to // poll the device to see if the device actually triggered the // interrupt. #define CYGNUM_HAL_INTERRUPT_PCI_S_INTC 32 // secondary PCI INTC #define CYGNUM_HAL_INTERRUPT_PCI_S_INTB 33 // secondary PCI INTB #define CYGNUM_HAL_INTERRUPT_PCI_S_INTA 34 // secondary PCI INTA // The vector used by the Real time clock #define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_INTERRUPT_TIMER //#define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_INTERRUPT_PMU_CCNT_OVFL #endif // CYGONCE_HAL_PLATFORM_INTS_H // EOF hal_platform_ints.h
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