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[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [arm/] [xscale/] [npwr/] [v2_0/] [include/] [pkgconf/] [mlt_arm_xscale_npwr_ram.ldi] - Rev 27
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// eCos memory layout - Tue Sep 05 16:58:21 2000// This is a generated file - do not edit#include <cyg/infra/cyg_type.inc>MEMORY{vrom : ORIGIN = 0x00000000, LENGTH = 0x1000ram : ORIGIN = 0xA0000000, LENGTH = 0x2000000}SECTIONS{SECTIONS_BEGINSECTION_fixed_vectors (vrom, 0x20, LMA_EQ_VMA) // virtual ROM addr, but really in physical ramSECTION_rom_vectors (ram, 0xa0020000, LMA_EQ_VMA)SECTION_text (ram, ALIGN (0x4), LMA_EQ_VMA)SECTION_fini (ram, ALIGN (0x4), LMA_EQ_VMA)SECTION_rodata (ram, ALIGN (0x4), LMA_EQ_VMA)SECTION_rodata1 (ram, ALIGN (0x4), LMA_EQ_VMA)SECTION_fixup (ram, ALIGN (0x4), LMA_EQ_VMA)SECTION_gcc_except_table (ram, ALIGN (0x4), LMA_EQ_VMA)SECTION_data (ram, ALIGN (0x4), LMA_EQ_VMA)SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA)CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);// CYG_LABEL_DEFN(__pci_window) = 0xf00000; . = CYG_LABEL_DEFN(__pci_window) + 0x100000;SECTIONS_END}
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