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[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [calmrisc16/] [ceb/] [v2_0/] [src/] [ser.c] - Rev 174
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//============================================================================= // // ser.c // // Simple driver for the MDSChip serial port // //============================================================================= //####ECOSGPLCOPYRIGHTBEGIN#### // ------------------------------------------- // This file is part of eCos, the Embedded Configurable Operating System. // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. // // eCos is free software; you can redistribute it and/or modify it under // the terms of the GNU General Public License as published by the Free // Software Foundation; either version 2 or (at your option) any later version. // // eCos is distributed in the hope that it will be useful, but WITHOUT ANY // WARRANTY; without even the implied warranty of MERCHANTABILITY or // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License // for more details. // // You should have received a copy of the GNU General Public License along // with eCos; if not, write to the Free Software Foundation, Inc., // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. // // As a special exception, if other files instantiate templates or use macros // or inline functions from this file, or you compile this file and link it // with other works to produce a work based on this file, this file does not // by itself cause the resulting work to be covered by the GNU General Public // License. However the source code for this file must still be made available // in accordance with section (3) of the GNU General Public License. // // This exception does not invalidate any other reasons why a work based on // this file might be covered by the GNU General Public License. // // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. // at http://sources.redhat.com/ecos/ecos-license/ // ------------------------------------------- //####ECOSGPLCOPYRIGHTEND#### //============================================================================= //#####DESCRIPTIONBEGIN#### // // Author(s): msalter // Contributors:msalter // Date: 2001-02-12 // Description: Simple driver for the MDSChip serial port // //####DESCRIPTIONEND#### // //============================================================================= #include <pkgconf/hal.h> #include <pkgconf/system.h> #include CYGBLD_HAL_PLATFORM_H #include <cyg/hal/hal_arch.h> // SAVE/RESTORE GP macros #include <cyg/hal/hal_io.h> // IO macros #include <cyg/hal/hal_if.h> // interface API #include <cyg/hal/hal_intr.h> // HAL_ENABLE/MASK/UNMASK_INTERRUPTS #include <cyg/hal/hal_misc.h> // Helper functions #include <cyg/hal/drv_api.h> // CYG_ISR_HANDLED // We have no control over baud rate #if CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD==57600 #define CYG_DEV_SERIAL_BAUD_DIVISOR BAUD_57600 #endif #ifndef CYG_DEV_SERIAL_BAUD_DIVISOR #error Missing/incorrect serial baud rate defined - CDL error? #endif //----------------------------------------------------------------------------- typedef struct { cyg_uint8* base; cyg_int32 msec_timeout; int isr_vector; } channel_data_t; static channel_data_t channels[1] = { { (cyg_uint8*)0, 1000, 0} }; //----------------------------------------------------------------------------- // The minimal init, get and put functions. All by polling. void cyg_hal_plf_serial_init_channel(void* __ch_data) { cyg_hal_plf_write_sr_rbr(0); cyg_hal_plf_write_sr_tbr(0); cyg_hal_plf_write_tbr(0); cyg_hal_plf_write_rbr(0); } void cyg_hal_plf_serial_putc(void* __ch_data, cyg_uint8 __ch) { // wait for tx rdy while (cyg_hal_plf_read_sr_tbr() != 0) ; // Now, write it cyg_hal_plf_write_tbr(__ch); // and set TBR cyg_hal_plf_write_sr_tbr(1); } static cyg_bool cyg_hal_plf_serial_getc_nonblock(void* __ch_data, cyg_uint8* ch) { if (cyg_hal_plf_read_sr_rbr() == 0) return false; *ch = cyg_hal_plf_read_rbr(); cyg_hal_plf_write_sr_rbr(0); return true; } cyg_uint8 cyg_hal_plf_serial_getc(void* __ch_data) { cyg_uint8 ch; while(!cyg_hal_plf_serial_getc_nonblock(__ch_data, &ch)); return ch; } static void cyg_hal_plf_serial_write(void* __ch_data, const cyg_uint8* __buf, cyg_uint32 __len) { while(__len-- > 0) cyg_hal_plf_serial_putc(__ch_data, *__buf++); } static void cyg_hal_plf_serial_read(void* __ch_data, cyg_uint8* __buf, cyg_uint32 __len) { while(__len-- > 0) *__buf++ = cyg_hal_plf_serial_getc(__ch_data); } cyg_bool cyg_hal_plf_serial_getc_timeout(void* __ch_data, cyg_uint8* ch) { int delay_count; channel_data_t* chan; cyg_bool res; // Some of the diagnostic print code calls through here with no idea what the ch_data is. // Go ahead and assume it is channels[0]. if (__ch_data == 0) __ch_data = (void*)&channels[0]; chan = (channel_data_t*)__ch_data; delay_count = chan->msec_timeout * 10; // delay in .1 ms steps for(;;) { res = cyg_hal_plf_serial_getc_nonblock(__ch_data, ch); if (res || 0 == delay_count--) break; CYGACC_CALL_IF_DELAY_US(100); } return res; } static int cyg_hal_plf_serial_control(void *__ch_data, __comm_control_cmd_t __func, ...) { static int irq_state = 0; channel_data_t* chan; int ret = 0; // Some of the diagnostic print code calls through here with no idea what the ch_data is. // Go ahead and assume it is channels[0]. if (__ch_data == 0) __ch_data = (void*)&channels[0]; chan = (channel_data_t*)__ch_data; switch (__func) { case __COMMCTL_IRQ_ENABLE: irq_state = 1; HAL_INTERRUPT_SET_LEVEL(chan->isr_vector, 1); HAL_INTERRUPT_UNMASK(chan->isr_vector); break; case __COMMCTL_IRQ_DISABLE: ret = irq_state; irq_state = 0; HAL_INTERRUPT_MASK(chan->isr_vector); break; case __COMMCTL_DBG_ISR_VECTOR: ret = chan->isr_vector; break; case __COMMCTL_SET_TIMEOUT: { va_list ap; va_start(ap, __func); ret = chan->msec_timeout; chan->msec_timeout = va_arg(ap, cyg_uint32); va_end(ap); } break; case __COMMCTL_SETBAUD: { cyg_uint32 baud_rate; va_list ap; va_start(ap, __func); baud_rate = va_arg(ap, cyg_uint32); va_end(ap); switch (baud_rate) { case 57600: break; default: return -1; } } break; case __COMMCTL_GETBAUD: break; default: break; } return ret; } static int cyg_hal_plf_serial_isr(void *__ch_data, int* __ctrlc, CYG_ADDRWORD __vector, CYG_ADDRWORD __data) { *__ctrlc = 0; return 0; } static void cyg_hal_plf_serial_init(void) { hal_virtual_comm_table_t* comm; int cur = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT); // Disable interrupts. HAL_INTERRUPT_MASK(channels[0].isr_vector); // Init channels cyg_hal_plf_serial_init_channel((void*)&channels[0]); // Setup procs in the vector table // Set channel 0 CYGACC_CALL_IF_SET_CONSOLE_COMM(0); comm = CYGACC_CALL_IF_CONSOLE_PROCS(); CYGACC_COMM_IF_CH_DATA_SET(*comm, &channels[0]); CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_serial_write); CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_plf_serial_read); CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_plf_serial_putc); CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_plf_serial_getc); CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_serial_control); CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_serial_isr); CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_serial_getc_timeout); // Restore original console CYGACC_CALL_IF_SET_CONSOLE_COMM(cur); } void cyg_hal_plf_comms_init(void) { static int initialized = 0; if (initialized) return; initialized = 1; cyg_hal_plf_serial_init(); } //----------------------------------------------------------------------------- // end of ser16c550c.c