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[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [h8300/] [sim/] [v2_0/] [include/] [pkgconf/] [mlt_h8300_h8300h_sim_ram.ldi] - Rev 307
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// eCos memory layout - Fri Oct 20 08:25:16 2000
// This is a generated file - do not edit
#include <cyg/infra/cyg_type.inc>
OUTPUT_FORMAT("elf32-h8300")
OUTPUT_ARCH(h8300h)
MEMORY
{
ram : ORIGIN = 0x000000, LENGTH = 0x200000
}
SECTIONS
{
SECTIONS_BEGIN
SECTION_rom_vectors (ram, 0x000000, LMA_EQ_VMA)
SECTION_text (ram, ALIGN (0x1), LMA_EQ_VMA)
SECTION_fini (ram, ALIGN (0x1), LMA_EQ_VMA)
SECTION_rodata (ram, ALIGN (0x1), LMA_EQ_VMA)
SECTION_rodata1 (ram, ALIGN (0x1), LMA_EQ_VMA)
SECTION_fixup (ram, ALIGN (0x1), LMA_EQ_VMA)
SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA)
SECTION_int_fook_table (ram, ALIGN (0x1), LMA_EQ_VMA)
SECTION_data (ram, ALIGN (0x4), LMA_EQ_VMA)
SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA)
CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
SECTIONS_END
}
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