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//==========================================================================
//
//      phy/VSC8244.c
//
//      Ethernet PHY driver
//
//==========================================================================
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//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s):    ccoutand
// Contributors: 
// Date:         2009-11-01
// Purpose:      
// Description:  Hardware driver for Ethernet PHY Vitesse VSC8244
//              
//
//####DESCRIPTIONEND####
//
//==========================================================================
 
#include <pkgconf/system.h>
#include <pkgconf/devs_eth_phy.h>
 
#include <cyg/infra/cyg_type.h>
 
#include <cyg/hal/hal_arch.h>
#include <cyg/hal/drv_api.h>
#include <cyg/hal/hal_if.h>
#include <cyg/hal/hal_tables.h>
 
#include <cyg/io/eth_phy.h>
#include <cyg/io/eth_phy_dev.h>
 
#include "VSC8244.h"
 
static bool VSC8244_stat(eth_phy_access_t *f, int *state)
{
    unsigned short phy_state;
    int tries;
    int auto_completed = 1;
    int link_up = 0;
 
    // Read negotiated state from the Quick Poll Detailed Status Register
    if (_eth_phy_read(f, VSC8244_MII_STAT_REG, f->phy_addr, &phy_state))
    {
 
        if ((phy_state & VSC8244_AUTO_COMPLETED) == 0)
        { 
            auto_completed = 0;
            eth_phy_printf("... waiting for auto-negotiation");
            for (tries = 0;  tries < CYGINT_DEVS_ETH_PHY_AUTO_NEGOTIATION_TIME;  tries++)
            {
                if (_eth_phy_read(f, VSC8244_MII_STAT_REG, f->phy_addr, &phy_state))
                {
                    if ((phy_state & VSC8244_AUTO_COMPLETED) != 0)
                    {                        
                        auto_completed = 1;
                        break;
                    }
                }
                CYGACC_CALL_IF_DELAY_US(1000000);   // 1 second
                eth_phy_printf(".");
            }
            eth_phy_printf("\n");
        }  
 
        if(phy_state & VSC8244_MII_PHY_STAT_LINK_UP)
          link_up = 1;
 
        if(auto_completed)
        {
          _eth_phy_read(f, VSC8244_MII_PHY_STAT_REG, f->phy_addr, &phy_state);
 
          if(link_up) 
            *state |= ETH_PHY_STAT_LINK;
          if(phy_state & VSC8244_MII_PHY_STAT_1000MB )
            *state |= ETH_PHY_STAT_1000MB;
          if(phy_state & VSC8244_MII_PHY_STAT_100MB)
            *state |= ETH_PHY_STAT_100MB;
          if(phy_state & VSC8244_MII_PHY_STAT_DUPLEX_FULL)
            *state |= ETH_PHY_STAT_FDX;
          return true;
        }
 
    }
    return false;
}
 
_eth_phy_dev("Vitesse VSC8244", 0x000FC6C2, VSC8244_stat)