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##=============================================================================
##
##      spi_a2fxxx.cdl
##
##      Smartfusion Cortex-M3 SPI driver configuration options.
##
##=============================================================================
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##=============================================================================
#######DESCRIPTIONBEGIN####
##
## Author(s):   ccoutand, updated for Smartfusion Cortex-M3
## Original(s): Chris Holgate
## Date:        2011-04-25
## Purpose:     Configure Smartfusion Cortex-M3 SPI driver.
##
######DESCRIPTIONEND####
##
##=============================================================================

cdl_package CYGPKG_DEVS_SPI_CORTEXM_A2FXXX {
    display       "Actel Smartfusion SPI driver"
    description   "
        This package provides SPI driver support for the Smartfusion Cortex-M3
        series of microcontrollers.
    "
    parent        CYGPKG_IO_SPI
    active_if     CYGPKG_IO_SPI
    requires      CYGPKG_HAL_CORTEXM_A2FXXX
    hardware
    include_dir   cyg/io
    compile       -library=libextras.a spi_a2fxxx.c

    cdl_option CYGDBG_DEVS_SPI_CORTEXM_A2FXXX_TRACE {
        display       "Display status messages during SPI operations"
        flavor        bool
        default_value 0
        description   "
           Selecting this option will cause the SPI driver to print status
           messages as various SPI operations are undertaken."
    }

    cdl_component CYGHWR_DEVS_SPI_CORTEXM_A2FXXX_BUS1 {
        display       "Actel Smartfusion SPI bus 1"
        description   "
            Enable SPI bus 1 on the A2FXXX device.
            "
        flavor        bool
        default_value false

        cdl_option CYGNUM_DEVS_SPI_CORTEXM_A2FXXX_BUS1_TX_DMA {
            display       "Transmit DMA channel number"
            flavor        data
            default_value 0
        }

        cdl_option CYGNUM_DEVS_SPI_CORTEXM_A2FXXX_BUS1_RX_DMA {
            display       "Receive DMA channel number"
            flavor        data
            default_value 1
        }

        cdl_option CYGDAT_DEVS_SPI_CORTEXM_A2FXXX_BUS1_TX_DMA_PRI {
            display       "Transmit DMA channel priority"
            legal_values  { "HIGH" "LOW" }
            flavor        data
            default_value { "HIGH" }
        }

        cdl_option CYGDAT_DEVS_SPI_CORTEXM_A2FXXX_BUS1_RX_DMA_PRI {
            display       "Receive DMA channel priority"
            legal_values  { "HIGH" "LOW" }
            flavor        data
            default_value { "HIGH" }
        }
    }

    cdl_component CYGHWR_DEVS_SPI_CORTEXM_A2FXXX_BUS2 {
        display       "Actel Smartfusion SPI bus 2"
        description   "
            Enable SPI bus 2 on the A2FXXX device.
        "
        flavor        bool
        default_value false

        cdl_option CYGNUM_DEVS_SPI_CORTEXM_A2FXXX_BUS2_TX_DMA {
            display       "Transmit DMA channel number"
            flavor        data
            default_value 2
        }

        cdl_option CYGNUM_DEVS_SPI_CORTEXM_A2FXXX_BUS2_RX_DMA {
            display       "Receive DMA channel number"
            flavor        data
            default_value 3
        }

        cdl_option CYGDAT_DEVS_SPI_CORTEXM_A2FXXX_BUS2_TX_DMA_PRI {
            display       "Transmit DMA channel priority"
            legal_values  { "HIGH" "LOW" }
            flavor        data
            default_value { "HIGH" }
        }

        cdl_option CYGDAT_DEVS_SPI_CORTEXM_A2FXXX_BUS2_RX_DMA_PRI {
            display       "Receive DMA channel priority"
            legal_values  { "HIGH" "LOW" }
            flavor        data
            default_value { "HIGH" }
        }
    }

    cdl_component CYGPKG_DEVS_SPI_CORTEXM_A2FXXX_OPTIONS {
        display "Actel Smartfusion SPI driver build options"
        flavor  none
        description   "
        Package specific build options including control over
        compiler flags used only in building this package,
        and details of which tests are built."

        cdl_option CYGPKG_DEVS_SPI_CORTEXM_A2FXXX_CFLAGS_ADD {
            display "Additional compiler flags"
            flavor  data
            no_define
            default_value { "" }
            description   "
                This option modifies the set of compiler flags for
                building the A2FXXX SPI driver. These flags are used in addition
                to the set of global flags."
        }

        cdl_option CYGPKG_DEVS_SPI_CORTEXM_A2FXXX_CFLAGS_REMOVE {
            display "Suppressed compiler flags"
            flavor  data
            no_define
            default_value { "" }
            description   "
                This option modifies the set of compiler flags for
                building the A2FXXX SPI driver. These flags are removed from
                the set of global flags if present."
        }
    }

}
# EOF spi_a2fxxx.cdl