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//==========================================================================
//
//      devs/watchdog/arm/lpc2xxx/watchdog_lpc2xxx.cxx
//
//      Watchdog implementation for ARM LPC2XXX CPU
//
//==========================================================================
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//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s):    jani 
// Contributors: tkoeller, nickg
// Date:         2004-10-05
// Purpose:      Watchdog class implementation
// Description:  Contains an implementation of the Watchdog class for use
//               with the Philips LPC2XXX watchdog timer.
//
//####DESCRIPTIONEND####
//
//==========================================================================
 
#include <pkgconf/kernel.h>
#include <pkgconf/infra.h>
#include <pkgconf/kernel.h>
#include <pkgconf/watchdog.h>
#include <pkgconf/devs_watchdog_arm_lpc2xxx.h>
 
#include <cyg/infra/cyg_type.h>
#include <cyg/infra/cyg_ass.h>
#include <cyg/infra/cyg_trac.h>
#include <cyg/hal/hal_io.h>
#include <cyg/hal/hal_diag.h>
 
#include <cyg/io/watchdog.hxx>
 
#include <cyg/hal/hal_var_ints.h>
#if !defined(CYGSEM_WATCHDOG_RESETS_ON_TIMEOUT)
#include <cyg/kernel/intr.hxx>
#endif
 
//==========================================================================
 
#define TICKS (CYGNUM_HAL_ARM_LPC2XXX_PCLK/4000 * \
               CYGNUM_DEVS_WATCHDOG_ARM_LPC2XXX_DESIRED_TIMEOUT_MS)
 
#define RESOLUTION CYGNUM_DEVS_WATCHDOG_ARM_LPC2XXX_DESIRED_TIMEOUT_MS*1000000
 
//==========================================================================
 
#if defined(CYGSEM_WATCHDOG_RESETS_ON_TIMEOUT)
 
#define MODVAL	(CYGARC_HAL_LPC2XXX_REG_WDMOD_WDEN | \
                 CYGARC_HAL_LPC2XXX_REG_WDMOD_WDRESET)
 
void
Cyg_Watchdog::init_hw(void)
{
  CYG_REPORT_FUNCTION();
  CYG_REPORT_FUNCARGVOID();
  resolution = RESOLUTION;
  CYG_REPORT_RETURN();
}
 
#else /* defined(CYGSEM_WATCHDOG_RESETS_ON_TIMEOUT) */
 
//==========================================================================
 
#define MODVAL	(CYGARC_HAL_LPC2XXX_REG_WDMOD_WDEN | \
                 CYGARC_HAL_LPC2XXX_REG_WDMOD_WDINT)
#define INT_PRIO    7
 
//==========================================================================
 
static Cyg_Watchdog *wd;
 
//==========================================================================
 
static cyg_uint32
isr(cyg_vector vector, CYG_ADDRWORD data)
{
  CYG_REPORT_FUNCTION();
  CYG_REPORT_FUNCARG2XV(vector, data);
 
  wd->trigger();
  Cyg_Interrupt::acknowledge_interrupt(CYGNUM_HAL_INTERRUPT_WD);
  CYG_REPORT_RETVAL(Cyg_Interrupt::HANDLED);
  return Cyg_Interrupt::HANDLED;
}
 
//==========================================================================
 
static CYGBLD_ATTRIB_INIT_PRI(CYG_INIT_INTERRUPTS)
  Cyg_Interrupt wdint(
    CYGNUM_HAL_INTERRUPT_WD,
    INT_PRIO,
    0,
    isr,
    NULL
  );
 
//==========================================================================
 
void
Cyg_Watchdog::init_hw(void)
{
  CYG_REPORT_FUNCTION();
  CYG_REPORT_FUNCARGVOID();
 
  wd = this;
  resolution = RESOLUTION;
  wdint.attach();
  wdint.acknowledge_interrupt(CYGNUM_HAL_INTERRUPT_WD);
  wdint.unmask_interrupt(CYGNUM_HAL_INTERRUPT_WD);
  CYG_REPORT_RETURN();
}
 
#endif	/* defined(CYGSEM_WATCHDOG_RESETS_ON_TIMEOUT) */
 
//==========================================================================
/*
 * Reset watchdog timer. This needs to be called regularly to prevent
 * the watchdog from firing.
 */
 
void
Cyg_Watchdog::reset(void)
{
  CYG_REPORT_FUNCTION();
  CYG_REPORT_FUNCARGVOID();
 
  /* Feed magic values to reset the watchdog. */
  HAL_WRITE_UINT32(CYGARC_HAL_LPC2XXX_REG_WD_BASE + 
                   CYGARC_HAL_LPC2XXX_REG_WDFEED, 
                   CYGARC_HAL_LPC2XXX_REG_WDFEED_MAGIC1);
  HAL_WRITE_UINT32(CYGARC_HAL_LPC2XXX_REG_WD_BASE + 
                   CYGARC_HAL_LPC2XXX_REG_WDFEED, 
                   CYGARC_HAL_LPC2XXX_REG_WDFEED_MAGIC2);
  CYG_REPORT_RETURN();
}
 
//==========================================================================
/*
 * Start watchdog to generate a hardware reset
 * or interrupt when expiring.
 */
 
void
Cyg_Watchdog::start(void)
{
  CYG_REPORT_FUNCTION();
  CYG_REPORT_FUNCARGVOID();
 
  HAL_WRITE_UINT32(CYGARC_HAL_LPC2XXX_REG_WD_BASE + 
                   CYGARC_HAL_LPC2XXX_REG_WDTC, TICKS);
  HAL_WRITE_UINT32(CYGARC_HAL_LPC2XXX_REG_WD_BASE + 
                   CYGARC_HAL_LPC2XXX_REG_WDMOD, MODVAL);
  /* Feed magic values to reset the watchdog. */
  HAL_WRITE_UINT32(CYGARC_HAL_LPC2XXX_REG_WD_BASE + 
                   CYGARC_HAL_LPC2XXX_REG_WDFEED, 
                   CYGARC_HAL_LPC2XXX_REG_WDFEED_MAGIC1);
  HAL_WRITE_UINT32(CYGARC_HAL_LPC2XXX_REG_WD_BASE + 
                   CYGARC_HAL_LPC2XXX_REG_WDFEED, 
                   CYGARC_HAL_LPC2XXX_REG_WDFEED_MAGIC2);
  CYG_REPORT_RETURN();
}
 
//==========================================================================
// End of watchdog_lpc2xxx.cxx