URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
Subversion Repositories openrisc
[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [hal/] [arm/] [at91/] [phycore/] [current/] [include/] [pkgconf/] [mlt_arm_at91_phycore_ram.ldi] - Rev 786
Compare with Previous | Blame | View Log
// eCos memory layout - Mon Jul 23 11:49:04 2001
// This is a generated file - do not edit
#include <cyg/infra/cyg_type.inc>
MEMORY
{
sram : ORIGIN = 0x00000000, LENGTH = 0x2000
ram : ORIGIN = 0x02000000, LENGTH = 0x200000
}
SECTIONS
{
SECTIONS_BEGIN
SECTION_fixed_vectors (sram, 0x20, LMA_EQ_VMA)
SECTION_rom_vectors (ram, 0x02008000, LMA_EQ_VMA)
SECTION_text (ram, ALIGN (0x4), LMA_EQ_VMA)
SECTION_fini (ram, ALIGN (0x4), LMA_EQ_VMA)
SECTION_rodata (ram, ALIGN (0x4), LMA_EQ_VMA)
SECTION_rodata1 (ram, ALIGN (0x4), LMA_EQ_VMA)
SECTION_fixup (ram, ALIGN (0x4), LMA_EQ_VMA)
SECTION_gcc_except_table (ram, ALIGN (0x4), LMA_EQ_VMA)
SECTION_data (ram, ALIGN (0x4), LMA_EQ_VMA)
SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA)
CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
SECTIONS_END
}