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#ifndef CYGONCE_HAL_ARM_XSCALE_IXDP425_IXDP425_H
#define CYGONCE_HAL_ARM_XSCALE_IXDP425_IXDP425_H
 
/*=============================================================================
//
//      ixdp425.h
//
//      Platform specific support (register layout, etc)
//
//=============================================================================
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// version.                                                                 
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// for more details.                                                        
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//
// As a special exception, if other files instantiate templates or use      
// macros or inline functions from this file, or you compile this file      
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// this file does not by itself cause the resulting work to be covered by   
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// General Public License v2.                                               
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// on this file might be covered by the GNU General Public License.         
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// ####ECOSGPLCOPYRIGHTEND####                                              
//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s):    msalter
// Contributors: msalter
// Date:         2002-12-10
// Purpose:      Intel IXDP425 specific support routines
// Description: 
// Usage:        #include <cyg/hal/ixdp425.h>
//
//####DESCRIPTIONEND####
//
//===========================================================================*/
 
#include <pkgconf/system.h>
#include CYGHWR_MEMORY_LAYOUT_H
#include <pkgconf/hal_arm_xscale_ixdp425.h>
#include <cyg/hal/hal_ixp425.h>
 
// These must match setup in the page table in hal_platform_extras.h
#define SDRAM_PHYS_BASE                    0x00000000
#define SDRAM_BASE                         0x00000000
#define SDRAM_ALIAS_BASE                   0x10000000
#define SDRAM_UNCACHED_BASE                0x20000000
#define SDRAM_DC_BASE                      0x30000000
#define SDRAM_SIZE                         0x10000000  // 256MB
 
#define IXDP425_LED_BASE                   0x52000000
#define IXDP425_LED_SIZE                   0x00100000
#define IXDP425_LED_DATA                   REG16(0, IXDP425_LED_BASE)
 
#define IXDP_FLASH_BASE                    0x50000000
#define IXDP_FLASH_SIZE                    0x01000000
#define IXDP_FLASH_DC_BASE                 0xA0000000
#define IXDP_FLASH_UNCACHED_BASE           0xB0000000
 
// CS0 (flash optimum timing)
#define IXP425_EXP_CS0_INIT \
 (EXP_ADDR_T(3) | EXP_SETUP_T(3) | EXP_STROBE_T(15) | EXP_HOLD_T(3) | \
  EXP_RECOVERY_T(15) | EXP_SZ_16M | EXP_WR_EN | EXP_BYTE_RD16 | EXP_CS_EN)
 
// CS2 (LED display)
#define IXP425_EXP_CS2_INIT  \
 (EXP_ADDR_T(3) | EXP_SETUP_T(3) | EXP_STROBE_T(15) | EXP_HOLD_T(3) | \
  EXP_RECOVERY_T(15) | EXP_SZ_512 | EXP_WR_EN | EXP_CS_EN)
 
#define IXP425_SDRAM_CONFIG_INIT  (SDRAM_CONFIG_CAS_3 | SDRAM_CONFIG_4x32Mx16)
#define IXP425_SDRAM_REFRESH_CNT  0x081
#define IXP425_SDRAM_SET_MODE_CMD SDRAM_IR_MODE_SET_CAS3
 
// ------------------------------------------------------------------------
// GPIO lines
 
#define GPIO_EEPROM_SDA  7
#define GPIO_EEPROM_SCL  6
#define GPIO_ENET1_INT_N 5
#define GPIO_ENET0_INT_N 4
#define GPIO_HSS0_INT_N  3
#define GPIO_HSS1_INT_N  2
#define GPIO_DSL_INT_N   1
 
// ------------------------------------------------------------------------
// 4 Digit Hex Display
//
// The board has two 4 hex digit display controlled by three board registers.
// Each digit has a decimal point and may be individually blanked.
 
#ifdef __ASSEMBLER__
        // Display hex digits in 'value' not masked by 'mask'.
	.macro DISPLAY value, reg0, reg1
	ldr    \reg0, =\value
	ldr    \reg1, =IXDP425_LED_DATA
	strh   \reg0, [\reg1]
#if 0
	// delay
        ldr     \reg0, =0x780000
    0:
        subs    \reg0, \reg0, #1
        bne     0b
#endif
	.endm
#else
static inline void HEX_DISPLAY(int value)
{
    *IXDP425_LED_DATA = value;
}
#endif // __ASSEMBLER__
 
// ------------------------------------------------------------------------
 
#endif // CYGONCE_HAL_ARM_XSCALE_IXDP425_IXDP425_H
// EOF ixdp425.h