OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [ARM7_LPC2106_GCC/] [ram_arm.bat] - Rev 611

Go to most recent revision | Compare with Previous | Blame | View Log 

set USE_THUMB_MODE=NO
set DEBUG=-g
set OPTIM=-O0
set RUN_MODE=RUN_FROM_RAM
set LDSCRIPT=lpc2106-ram.ld
make

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.