OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [ARM7_LPC2106_GCC/] [readme.txt] - Rev 866

Go to most recent revision | Compare with Previous | Blame | View Log

Use one of the following four batch files to build the demo application:

+ rom_arm.bat

Creates an ARM mode release build suitable for programming into flash.

+ ram_arm.bat

Creates an ARM mode debug build suitable for running from RAM.

+ rom_thumb.bat

Creates a THUMB mode release build suitable for programming into flash.

+ ram_thumb.bat

Creates a THUMB mode debug build suitable for running from RAM.

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.