OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [ARM7_STR75x_GCC/] [SystemFiles/] [STR75xFx0_DEF_FreeRTOS.ld] - Rev 623

Go to most recent revision | Compare with Previous | Blame | View Log

/*
Linker subscript for STR75xFx0 definitions
Copyright RAISONANCE 2005
You can use, modify and distribute thisfile freely, but without any waranty.
*/


/* Memory Spaces Definitions */

MEMORY
{
  FLASH (rx) : ORIGIN = 0x20000000, LENGTH = 128K
  FLASHB1 (rx) : ORIGIN = 0x200C0000, LENGTH = 16K
  RAM (xrw) : ORIGIN = 0x40000000, LENGTH = 16K
  EXTMEMB0 (rx) : ORIGIN = 0x60000000, LENGTH = 16M
  EXTMEMB1 (rx) : ORIGIN = 0x62000000, LENGTH = 16M
  EXTMEMB2 (rx) : ORIGIN = 0x64000000, LENGTH = 16M
  EXTMEMB3 (rx) : ORIGIN = 0x66000000, LENGTH = 16M
}

/* higher address of the user mode stack */
_estack = 0x40004000;

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.