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[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [CORTEX_AT91SAM3U256_IAR/] [system/] [at91sam3u4/] [sram.icf] - Rev 580
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/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */
/*-Vector table start*/
define symbol __ICFEDIT_vector_start__ = 0x20000000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_RAM0_start__ = 0x20000000;
define symbol __ICFEDIT_region_RAM0_end__ = 0x20007FFF;
define symbol __ICFEDIT_region_RAM1_start__ = 0x20080000;
define symbol __ICFEDIT_region_RAM1_end__ = 0x20083FFF;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_heap__ = 0x200;
/*-Exports-*/
export symbol __ICFEDIT_vector_start__;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region RAM0_region = mem:[from __ICFEDIT_region_RAM0_start__ to __ICFEDIT_region_RAM0_end__];
define region RAM1_region = mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__];
/*define region RAM_region = mem:[from __ICFEDIT_region_RAM0_start__+__ICFEDIT_size_vectors__ to __ICFEDIT_region_RAM0_end__] |
mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__];*/
/* define block RamVect with alignment = 8, size = __ICFEDIT_size_vectors__ { }; */
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_vector_start__ { readonly section .vectors };
place in RAM0_region { readonly };
place in RAM1_region { readwrite, block CSTACK, block HEAP };