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[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [CORTEX_LM3Sxxxx_IAR_Keil/] [LM3Sxxxx.icf] - Rev 664
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//*****************************************************************************
//
// enet_lwip.icf - Linker configuration file for enet_lwip.
//
// Copyright (c) 2007 Luminary Micro, Inc. All rights reserved.
// Luminary Micro Confidential - For Use Under NDA Only
//
//*****************************************************************************
//
// Define a memory region that covers the entire 4 GB addressible space of the
// processor.
//
define memory mem with size = 4G;
//
// Define a region for the on-chip flash.
//
define region FLASH = mem:[from 0x00000000 to 0x0003ffff];
//
// Define a region for the on-chip SRAM.
//
define region SRAM = mem:[from 0x20000000 to 0x2000ffff];
//
// Define a block for the heap. The size should be set to something other
// than zero if things in the C library that require the heap are used.
//
define block HEAP with alignment = 8, size = 0x00000000 { };
//
// Indicate that the read/write values should be initialized by copying from
// flash.
//
initialize by copy { readwrite };
//
// Initicate that the noinit values should be left alone. This includes the
// stack, which if initialized will destroy the return address from the
// initialization code, causing the processor to branch to zero and fault.
//
do not initialize { section .noinit };
//
// Place the interrupt vectors at the start of flash.
//
place at start of FLASH { readonly section .intvec };
//
// Place the remainder of the read-only items into flash.
//
place in FLASH { readonly };
//
// Place all read/write items into SRAM.
//
place in SRAM { readwrite, block HEAP };
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