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[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [ColdFire_MCF52259_CodeWarrior/] [lcf/] [MCF52259_INTERNAL_FLASH.lcf] - Rev 799
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# NOTE: The debugger uses the Illegal Instruction Vector to stop.
# A small subroutine is written at the location VBR+0x408-VBR+0x40B
# to handle the exception. The Illegal Instruction Vector in
# the the vector table at VBR+0x10 is then pointed to it. When the
# debugger encounters an illegal instruction, it jumps to this
# subroutine, which ends with an RTE, then exits.
# Do not overwrite this area of memory otherwise the debugger may not
# exit properly.
# */
MEMORY
{
vectorflash(RX) : ORIGIN = 0x00000000, LENGTH = 0x00000418
flash (RX) : ORIGIN = 0x00000420, LENGTH = 0x0007FC00
vectorram(RWX) : ORIGIN = 0x20000000, LENGTH = 0x00000400
sram (RWX) : ORIGIN = 0x20000400, LENGTH = 0x0000FA00
ipsbar (RWX) : ORIGIN = 0x40000000, LENGTH = 0x0
}
SECTIONS
{
.ipsbar : {} > ipsbar
.vectorflash :
{
mcf5225x_vectors.s (.text)
} > vectorflash
.flash :
{
*(.text)
. = ALIGN(0x10);
*(.rodata)
___DATA_ROM = .;
} > flash
.data : AT(___DATA_ROM)
{
___DATA_RAM = . ;
*(.exception)
. = ALIGN(0x10);
__exception_table_start__ = .;
EXCEPTION
__exception_table_end__ = .;
___sinit__ = .;
STATICINIT
*(.data)
*(.relocate_code)
. = ALIGN (0x10);
___DATA_END = .;
__START_SDATA = .;
*(.sdata)
. = ALIGN (0x10);
__END_SDATA = .;
__SDA_BASE = .;
. = ALIGN(0x10);
} > sram
.bss :
{
. = ALIGN(0x10);
__START_SBSS = .;
*(.sbss)
*(SCOMMON)
__END_SBSS = .;
. = ALIGN(0x10);
__START_BSS = .;
*(.bss)
*(COMMON)
__END_BSS = .;
___BSS_START = __START_SBSS;
___BSS_END = __END_BSS;
. = ALIGN(0x10);
} >> sram
___FLASH = ADDR(.vectorflash);
___FLASH_SIZE = 0x00080000;
___SRAM = 0x20000400;
___SRAM_SIZE = 0x0000FC00;
___VECTOR_RAM = 0x20000000;
___IPSBAR = ADDR(.ipsbar);
___SP_SIZE = 0x200;
___HEAP_START = .;
___HEAP_END = ___SRAM + ___SRAM_SIZE - ___SP_SIZE;
___SP_END = ___HEAP_END;
___SP_INIT = ___SP_END + ___SP_SIZE;
___heap_addr = ___HEAP_START;
___heap_size = ___HEAP_END - ___HEAP_START ;
__SP_INIT = ___SP_INIT;
}
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