URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
Subversion Repositories openrisc
[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [HCS12_CodeWarrior_banked/] [CODE/] [Copy of Vectors.c] - Rev 664
Go to most recent revision | Compare with Previous | Blame | View Log
/** ################################################################### ** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT. ** Filename : Cpu.C ** Project : RTOSDemo ** Processor : MC9S12DP256BCPV ** Beantype : MC9S12DP256_112 ** Version : Bean 01.148, Driver 01.09, CPU db: 2.87.283 ** Compiler : Metrowerks HC12 C Compiler ** Date/Time : 16/06/2005, 19:18 ** Abstract : ** This bean "MC9S12DP256_112" implements properties, methods, ** and events of the CPU. ** Settings : ** ** Contents : ** EnableInt - void Cpu_EnableInt(void); ** DisableInt - void Cpu_DisableInt(void); ** ** (c) Copyright UNIS, spol. s r.o. 1997-2002 ** UNIS, spol. s r.o. ** Jundrovska 33 ** 624 00 Brno ** Czech Republic ** http : www.processorexpert.com ** mail : info@processorexpert.com ** ###################################################################*/ #include "Cpu.h" #include "TickTimer.h" #include "Byte1.h" extern void near _EntryPoint(void); /* Startup routine */ extern void near vPortTickInterrupt( void ); extern void near vPortYield( void ); extern void near vCOM0_ISR( void ); typedef void (*near tIsrFunc)(void); const tIsrFunc _vect[] @0xFF80 = { /* Interrupt table */ Cpu_Interrupt, /* 0 Default (unused) interrupt */ Cpu_Interrupt, /* 1 Default (unused) interrupt */ Cpu_Interrupt, /* 2 Default (unused) interrupt */ Cpu_Interrupt, /* 3 Default (unused) interrupt */ Cpu_Interrupt, /* 4 Default (unused) interrupt */ Cpu_Interrupt, /* 5 Default (unused) interrupt */ Cpu_Interrupt, /* 6 Default (unused) interrupt */ Cpu_Interrupt, /* 7 Default (unused) interrupt */ Cpu_Interrupt, /* 8 Default (unused) interrupt */ Cpu_Interrupt, /* 9 Default (unused) interrupt */ Cpu_Interrupt, /* 10 Default (unused) interrupt */ Cpu_Interrupt, /* 11 Default (unused) interrupt */ Cpu_Interrupt, /* 12 Default (unused) interrupt */ Cpu_Interrupt, /* 13 Default (unused) interrupt */ Cpu_Interrupt, /* 14 Default (unused) interrupt */ Cpu_Interrupt, /* 15 Default (unused) interrupt */ Cpu_Interrupt, /* 16 Default (unused) interrupt */ Cpu_Interrupt, /* 17 Default (unused) interrupt */ Cpu_Interrupt, /* 18 Default (unused) interrupt */ Cpu_Interrupt, /* 19 Default (unused) interrupt */ Cpu_Interrupt, /* 20 Default (unused) interrupt */ Cpu_Interrupt, /* 21 Default (unused) interrupt */ Cpu_Interrupt, /* 22 Default (unused) interrupt */ Cpu_Interrupt, /* 23 Default (unused) interrupt */ Cpu_Interrupt, /* 24 Default (unused) interrupt */ Cpu_Interrupt, /* 25 Default (unused) interrupt */ Cpu_Interrupt, /* 26 Default (unused) interrupt */ Cpu_Interrupt, /* 27 Default (unused) interrupt */ Cpu_Interrupt, /* 28 Default (unused) interrupt */ Cpu_Interrupt, /* 29 Default (unused) interrupt */ Cpu_Interrupt, /* 30 Default (unused) interrupt */ Cpu_Interrupt, /* 31 Default (unused) interrupt */ Cpu_Interrupt, /* 32 Default (unused) interrupt */ Cpu_Interrupt, /* 33 Default (unused) interrupt */ Cpu_Interrupt, /* 34 Default (unused) interrupt */ Cpu_Interrupt, /* 35 Default (unused) interrupt */ Cpu_Interrupt, /* 36 Default (unused) interrupt */ Cpu_Interrupt, /* 37 Default (unused) interrupt */ Cpu_Interrupt, /* 38 Default (unused) interrupt */ Cpu_Interrupt, /* 39 Default (unused) interrupt */ Cpu_Interrupt, /* 40 Default (unused) interrupt */ Cpu_Interrupt, /* 41 Default (unused) interrupt */ Cpu_Interrupt, /* 42 Default (unused) interrupt */ vCOM0_ISR, Cpu_Interrupt, /* 44 Default (unused) interrupt */ Cpu_Interrupt, /* 45 Default (unused) interrupt */ Cpu_Interrupt, /* 46 Default (unused) interrupt */ Cpu_Interrupt, /* 47 Default (unused) interrupt */ Cpu_Interrupt, /* 48 Default (unused) interrupt */ Cpu_Interrupt, /* 49 Default (unused) interrupt */ Cpu_Interrupt, /* 50 Default (unused) interrupt */ Cpu_Interrupt, /* 51 Default (unused) interrupt */ Cpu_Interrupt, /* 52 Default (unused) interrupt */ Cpu_Interrupt, /* 53 Default (unused) interrupt */ Cpu_Interrupt, /* 54 Default (unused) interrupt */ vPortTickInterrupt, Cpu_Interrupt, /* 56 Default (unused) interrupt */ Cpu_Interrupt, /* 57 Default (unused) interrupt */ Cpu_Interrupt, /* 58 Default (unused) interrupt */ vPortYield, /* 59 Default (unused) interrupt */ Cpu_Interrupt, /* 60 Default (unused) interrupt */ Cpu_Interrupt, /* 61 Default (unused) interrupt */ Cpu_Interrupt, /* 62 Default (unused) interrupt */ _EntryPoint /* Reset vector */ }; /* ** ################################################################### ** ** This file was created by UNIS Processor Expert 03.33 for ** the Motorola HCS12 series of microcontrollers. ** ** ################################################################### */
Go to most recent revision | Compare with Previous | Blame | View Log