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URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [lwIP_Demo_Rowley_ARM7/] [atmel-rom.ld] - Rev 583

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MEMORY 
{
        flash   : ORIGIN = 0x00100000, LENGTH = 256K
        ram             : ORIGIN = 0x00200000, LENGTH = 64K
}

__stack_end__ = 0x00200000 + 64K - 4;

SECTIONS 
{
        . = 0;
        startup : { *(.startup)} >flash

        prog : 
        {
                *(.text)
                *(.rodata)
                *(.rodata*)
                *(.glue_7)
                *(.glue_7t)
        } >flash

        __end_of_text__ = .;

        .data : 
        {
                __data_beg__ = .;
                __data_beg_src__ = __end_of_text__;
                *(.data)
                __data_end__ = .;
        } >ram AT>flash

        .bss : 
        {
                __bss_beg__ = .;
                *(.bss)
        } >ram

        /* Align here to ensure that the .bss section occupies space up to
        _end.  Align after .bss to ensure correct alignment even if the
        .bss section disappears because there are no input sections.  */
        . = ALIGN(32 / 8);
}
        . = ALIGN(32 / 8);
        _end = .;
        _bss_end__ = . ; __bss_end__ = . ; __end__ = . ;
        PROVIDE (end = .);


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