OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libbsp/] [m68k/] [idp/] [timer/] [timerisr.S] - Rev 214

Go to most recent revision | Compare with Previous | Blame | View Log

/*  timer_isr()
 *
 *  This routine provides the ISR for the MC68230 timer on the Motorola
 *  IDP board.   The timer is set up to generate an interrupt at maximum
 *  intervals.
 *
 *  Code modified by Doug McBride, Colorado Space Grant College
 *  countdown should be loaded automatically
 *
 *  Input parameters:  NONE
 *
 *  Output parameters:  NONE
 *
 *  COPYRIGHT (c) 1989-1999.
 *  On-Line Applications Research Corporation (OAR).
 *
 *  The license and distribution terms for this file may be
 *  found in the file LICENSE in this distribution or at
 *  http://www.OARcorp.com/rtems/license.html.
 *
 *  $Id: timerisr.S,v 1.2 2001-09-27 12:00:12 chris Exp $
 */

#include "asm.h"

BEGIN_CODE

.set TSR,        0x00c0106B              | base address of PIT register "TSR"

        PUBLIC (timerisr)
SYM (timerisr):
        movb    #1,TSR                                         | acknowledge interrupt
        addql   #1, SYM (Ttimer_val)   | increment timer value
        rte

END_CODE
END

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.