OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libbsp/] [m68k/] [ods68302/] [startup/] [rom] - Rev 173

Compare with Previous | Blame | View Log

/*
 * $Id: rom,v 1.2 2001-09-27 12:00:23 chris Exp $
 *
 * MC68302 Linker command file
 *
 */

SECTIONS
{
  .text . :
  {
    text_start = .;
    *(.text)
    etext = .;
    . = ALIGN(4);
    __CTOR_LIST__ = .;
    LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2)
    *(.ctors)
    LONG(0)
    __CTOR_END__ = .;
    . = ALIGN(4);
    __DTOR_LIST__ = .;
    LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2)
    *(.dtors)
    LONG(0)
    __DTOR_END__ = .;
  }
  
  .vtable 0 :
  {
    vtable_start = .;
    *(.vtable)
    evtable = .;
  }

  .data (ADDR(.vtable) + SIZEOF(.vtable)) : 
     AT (ADDR(.text) + SIZEOF(.text))
  {
    data_start = .;
    *(.data)
    edata = .;
  }
  .bss (ADDR(.data) + SIZEOF(.data)) :
  {
    bss_start = .;
    *(.bss)
    *(COMMON)
    end = . ;
    _end = . ;
  }  
}

m302 = MC68302_BASE;
_VBR = 0;               /* location of the VBR table (in RAM) */


Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.