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[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libbsp/] [m68k/] [shared/] [start.S] - Rev 329
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/* entry.s** This file contains the entry point for the application.* The name of this entry point is compiler dependent.* It jumps to the BSP which is responsible for performing* all initialization.** COPYRIGHT (c) 1989-1999.* On-Line Applications Research Corporation (OAR).** The license and distribution terms for this file may be* found in the file LICENSE in this distribution or at* http://www.OARcorp.com/rtems/license.html.** $Id: start.S,v 1.2 2001-09-27 12:00:24 chris Exp $*/#include "asm.h"#if (M68K_COLDFIRE_ARCH == 0) /* All ColdFire BSPs must provide their own start vector */BEGIN_CODE| Default entry points for:PUBLIC (start) | GNUPUBLIC (M68Kvec) | Vector TableSYM (start):SYM (M68Kvec): | standard location for vectorsnop | for linkers with problem| location zerojmp SYM (start_around)/** We can use the following space as our vector table* if the CPU has a VBR or we can save vector table in it* if the CPU does not.*/.space 4088 | to avoid initial intr stack| from 135BUG on MVME13?| and start code at 0x4000SYM (vectors):.space 1016 | reserve space for rest of vectors#if ( M68K_HAS_SEPARATE_STACKS == 1 )SYM (lowintstack):.space 4092 | reserve for interrupt stackSYM (hiintstack):.space 4 | end of interrupt stack#endifPUBLIC (start_around)SYM (start_around):move.w sr, SYM (initial_sr)oriw #0x3700,sr | SUPV MODE,INTERRUPTS OFF!!!#if ( M68K_HAS_SEPARATE_STACKS == 1 )movec isp,a0move.l a0, SYM (initial_isp)movec usp,a0move.l a0, SYM (initial_usp)movec msp,a0move.l a0, SYM (initial_msp)#elsemove.l a7, SYM (initial_msp)#endif|| zero out uninitialized data area|zerobss:moveal # SYM (_clear_end),a0 | find end of .bssmoveal # SYM (_clear_start),a1 | find beginning of .bssmovel #0,d0loop: movel #0,a1@+ | to zero out uninitializedcmpal a0,a1jlt loop | loop until _end reachedmovel # SYM (_stack_init),d0 | d0 = stop of stackmovw #0x3700,sr | SUPV MODE,INTERRUPTS OFF!!!movel d0,a7 | set master stack pointermovel d0,a6 | set base pointer/** RTEMS should maintain a separate interrupt stack on CPUs* without one in hardware. This is currently not supported* on versions of the m68k without a HW intr stack.*/#if ( M68K_HAS_SEPARATE_STACKS == 1 )lea SYM (hiintstack),a0 | a0 = high end of intr stackmovec a0,isp | set interrupt stack#endifpea env | push environppea arg | push argvmovel #0,a7@- | push argcjsr SYM (boot_card)addl #12,a7#if ( M68K_HAS_SEPARATE_STACKS == 1 )move.l SYM (initial_isp),a0movec a0,ispmove.l SYM (initial_usp),a0movec a0,uspmove.l SYM (initial_msp),a0movec a0,msp#elsemovea.l SYM (initial_msp),a7#endifmove.w SYM (initial_sr),srrtsEND_CODEBEGIN_DATAPUBLIC (environ).align 2SYM (environ):.long envPUBLIC (start_frame)SYM (start_frame):.space 4,0END_DATABEGIN_BSSenv: .long 0arg: .long 0PUBLIC (initial_isp)SYM (initial_isp):.space 4PUBLIC (initial_msp)SYM (initial_msp):.space 4PUBLIC (initial_usp)SYM (initial_usp):.space 4PUBLIC (initial_sr)SYM (initial_sr):.space 2END_DATA#endifEND
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