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[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libbsp/] [sh/] [gensh2/] [startup/] [linkcmds] - Rev 173
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/*
* This is an adapted linker script from egcs-1.0.1
*
* Memory layout for an SH7045F with main memory in area 2
* This memory layout it very similar to that used for Hitachi's
* EVB with CMON in FLASH
*
* NOTE: The ram start address may vary, all other start addresses are fixed
* Not suiteable for gdb's simulator
*
* Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
* Bernd Becker (becker@faw.uni-ulm.de)
*
* COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
*
*
* COPYRIGHT (c) 1998.
* On-Line Applications Research Corporation (OAR).
* Copyright assigned to U.S. Government, 1994.
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* Modified to reflect SH7045F processor and EVB:
* John M. Mills (jmills@tga.com)
* TGA Technologies, Inc.
* 100 Pinnacle Way, Suite 140
* Norcross, GA 30071 U.S.A.
*
* This modified file may be copied and distributed in accordance
* the above-referenced license. It is provided for critique and
* developmental purposes without any warranty nor representation
* by the authors or by TGA Technologies.
*
* $Id: linkcmds,v 1.2 2001-09-27 12:01:12 chris Exp $
*/
OUTPUT_FORMAT("coff-sh")
OUTPUT_ARCH(sh)
ENTRY(_start)
/* These assignments load code into SH7045F EVB SRAM for monitor debugging */
MEMORY
{
rom : o = 0x00400000, l = 0x00040000
ram : o = 0x00440000, l = 0x00040000
onchip_peri : o = 0xFFFF8000, l = 0x00000800
onchip_ram : o = 0xFFFFF000, l = 0x00001000
}
/* Sections are defined for RAM loading and monitor debugging */
SECTIONS
{
/* boot vector table */
.monvects 0x00400000 (NOLOAD): {
_monvects = . ;
} > rom
/* monitor play area */
.monram 0x00440000 (NOLOAD) :
{
_ramstart = .;
} > ram
/* monitor vector table */
.vects 0x00442000 (NOLOAD) : {
_vectab = . ;
*(.vects);
}
/* Read-only sections, merged into text segment: */
. = 0x00444000 ;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.gnu.version : { *(.gnu.version) }
.gnu.version_d : { *(.gnu.version_d) }
.gnu.version_r : { *(.gnu.version_r) }
.rel.text :
{ *(.rel.text) *(.rel.gnu.linkonce.t*) }
.rela.text :
{ *(.rela.text) *(.rela.gnu.linkonce.t*) }
.rel.data :
{ *(.rel.data) *(.rel.gnu.linkonce.d*) }
.rela.data :
{ *(.rela.data) *(.rela.gnu.linkonce.d*) }
.rel.rodata :
{ *(.rel.rodata) *(.rel.gnu.linkonce.r*) }
.rela.rodata :
{ *(.rela.rodata) *(.rela.gnu.linkonce.r*) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.init : { *(.rel.init) }
.rela.init : { *(.rela.init) }
.rel.fini : { *(.rel.fini) }
.rela.fini : { *(.rela.fini) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) } =0
.plt : { *(.plt) }
.text . :
{
*(.text)
*(.stub)
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
*(.gnu.linkonce.t*)
} > ram
_etext = .;
PROVIDE (etext = .);
.fini . : { *(.fini) } =0
.rodata . : { *(.rodata) *(.gnu.linkonce.r*) }
.rodata1 . : { *(.rodata1) }
/* Adjust the address for the data segment. We want to adjust up to
the same address within the page on the next page up. */
. = ALIGN(128) + (. & (128 - 1));
.data . :
{
*(.data)
*(.gnu.linkonce.d*)
CONSTRUCTORS
} > ram
.data1 . : { *(.data1) }
.ctors . :
{
___ctors = .;
*(.ctors)
___ctors_end = .;
}
.dtors . :
{
___dtors = .;
*(.dtors)
___dtors_end = .;
}
.got . : { *(.got.plt) *(.got) }
.dynamic . : { *(.dynamic) }
/* We want the small data sections together, so single-instruction offsets
can access them all, and initialized data all before uninitialized, so
we can shorten the on-disk segment size. */
.sdata . : { *(.sdata) }
_edata = .;
PROVIDE (edata = .);
__bss_start = .;
.sbss . : { *(.sbss) *(.scommon) }
.bss . :
{
*(.dynbss)
*(.bss)
*(COMMON)
} > ram
_end = . ;
PROVIDE (end = .);
_HeapStart = . ;
. = . + 1024 * 20 ;
PROVIDE( _HeapEnd = . );
_WorkSpaceStart = . ;
. = 0x00480000 ;
PROVIDE(_WorkSpaceEnd = .);
_CPU_Interrupt_stack_low = 0xFFFFF000 ;
_CPU_Interrupt_stack_high = _CPU_Interrupt_stack_low + 4096 ;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.stack 0xFFFFFEC0 : { _stack = .; *(.stack) } > onchip_ram
/* These must appear regardless of . */
}