OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libcpu/] [m68k/] [m68040/] [fpsp/] [x_bsun.S] - Rev 173

Compare with Previous | Blame | View Log

//
//      $Id: x_bsun.S,v 1.2 2001-09-27 12:01:22 chris Exp $
//
//      x_bsun.sa 3.3 7/1/91
//
//      fpsp_bsun --- FPSP handler for branch/set on unordered exception
//
//      Copy the PC to FPIAR to maintain 881/882 compatibility
//
//      The real_bsun handler will need to perform further corrective
//      measures as outlined in the 040 User's Manual on pages
//      9-41f, section 9.8.3.
//

//              Copyright (C) Motorola, Inc. 1990
//                      All Rights Reserved
//
//      THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
//      The copyright notice above does not evidence any  
//      actual or intended publication of such source code.

X_BSUN: //idnt    2,1 | Motorola 040 Floating Point Software Package

        |section        8

#include "fpsp.defs"

        |xref   real_bsun

        .global fpsp_bsun
fpsp_bsun:
//
        link            %a6,#-LOCAL_SIZE
        fsave           -(%a7)
        moveml          %d0-%d1/%a0-%a1,USER_DA(%a6)
        fmovemx %fp0-%fp3,USER_FP0(%a6)
        fmoveml %fpcr/%fpsr/%fpiar,USER_FPCR(%a6)

//
        movel           EXC_PC(%a6),USER_FPIAR(%a6)
//
        moveml          USER_DA(%a6),%d0-%d1/%a0-%a1
        fmovemx USER_FP0(%a6),%fp0-%fp3
        fmoveml USER_FPCR(%a6),%fpcr/%fpsr/%fpiar
        frestore        (%a7)+
        unlk            %a6
        bral            real_bsun
//
        |end

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.