OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [libchip/] [serial/] [README.ns16550] - Rev 517

Go to most recent revision | Compare with Previous | Blame | View Log

#
#  $Id: README.ns16550,v 1.2 2001-09-27 12:01:42 chris Exp $
#

Status
======

This driver appears to work OK for polled output at this point.  

It needs to be tested for:

  + polled input
  + interrupt driver output
  + interrupt driver input

This driver does not support the new style RTEMS interrupt processing
used on the i386 and some PowerPC models.

Configuration Table Use
=======================

sDeviceName

   The name of this device.

deviceType

   This field must be SERIAL_NS16550.

pDeviceFns

   The device interface control table.  This may be:
      + ns16550_fns for interrupt driven IO
      + ns16550_fns_polled for polled IO

deviceProbe

   This is the address of the routine which probes to see if the device
   is present.

pDeviceFlow

   This field is ignored as hardware flow control is not currently supported.

ulMargin

    This is currently unused.

ulHysteresis

    This is currently unused.

pDeviceParams

    This is set to the default settings.  At this point, it is the default
    baud rate cast as a (void *).

ulCtrlPort1

   This field is the base address of this port on the UART.

ulCtrlPort2

   This field is unused for the NS16550.

ulDataPort

   This field is the base address of this port on the UART. 

getRegister
setRegister

   These follow standard conventions.

getData
setData

   These are unused since the TX and RX data registers can be accessed
   as regular registers.

ulClock

   This is the clock constant which is divided by the desired baud
   to get the value programmed into the part.  The formula for this
   for 9600 baud is:

      chip_divisor_value = ulClock / 9600.

   NOTE: When ulClock is 0, the correct value for a PC (115,200) is
   used.

ulIntVector

   This is the interrupt vector number associated with this chip.

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.