Subversion Repositories opentech

Changes from version 1.4.1

OpenCores.org
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Site and CVS are Updated

DESIGNS
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- UTNios processor (updated)
- Handasa Arabia site (updated)
- VLSI technology library (updated)  
- Free Model Foundation models (updated)
- Elphel designs (updated)

TOOLS:
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In Design Entry
- gEDA (updated)
- TinyCad (updated)
- xcircuit (updated)
- HDLmaker (updated)
- veditor_Eclipse (updated)
- la2vcd (updated)

In pcb
-  KICAD (added)
- PCB Editor  (updated)

In PLDs
- JHLD (updated)
- Vertix tools

In uC
- gputils (updated)
- PiKdev (added)
- ketchlab (updated)
- MicroDev (added)
- gpsim (updated)
- Broccoli18 (updated)
- Odyssey (added)
- SDCC (updated)

In  Analysis
- Salut (updated)
- Electronics Solver (updated)

In Spice
- adms (updated)

In simulation
- Qucs (updated)
-thud (updated)
- SIMSYNCH (added)
-digitel (updated)
-decida (updated)
-udl (updated)
-IDASS (updated)

in Synthesis
- MVSIS (added)
- bexpred (updated)

In IC layout/vlsi
- Alliance (updated)
- electric (updated)
-MGEN (updated)
-magic (updated)
- chipmunk (updated)
- QCADesign (added)

In Verification
- NuSMV (updated)
- Covered: Coverage Tool  (updated)
- system perl (added)
- Teal (added)
- MyHDL (updated)
- confluence (updated)


In instruments
- qoscc (updated)
-QtDMM (updated)
-zmeter (updated)
-GPIB-Tcl (updated)

In Others
- EDA-Index (updated)

In Verilog
- Ircus (updated)
- sc2v (added)
- Mariana (added)
- Vtracer (updated)
- GPLCver (updated)
- dinotrace (updated)
- verilog perl (updated)
- verilog PLI (updated0


- VHDL 
- Alliance (updated)
- electric (updated)
- Freehdl (updated)
-signs (added)
- VHDL parser (added)

in ROMs
- Srecord (updated)

In Modeling
- simuted (added)
- Gezel (added)
- Plois (added)
- Potlemy II (added)