OpenCores
URL https://opencores.org/ocsvn/or1200_soc/or1200_soc/trunk

Subversion Repositories or1200_soc

[/] [or1200_soc/] [trunk/] [boards/] [de1_board/] [libs/] [or1200.cr.mti] - Rev 22

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C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_dmmu_top.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_dmmu_top.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_dmmu_top

Top level modules:
        or1200_dmmu_top

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_dpram_256x32.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_dpram_256x32.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_dpram_256x32

Top level modules:
        or1200_dpram_256x32

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_spram_32x24.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_spram_32x24.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_spram_32x24

Top level modules:
        or1200_spram_32x24

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_spram_2048x8.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_spram_2048x8.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_spram_2048x8

Top level modules:
        or1200_spram_2048x8

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_spram_64x22.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_spram_64x22.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_spram_64x22

Top level modules:
        or1200_spram_64x22

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_iwb_biu.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_iwb_biu.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_iwb_biu

Top level modules:
        or1200_iwb_biu

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_dmmu_tlb.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_dmmu_tlb.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_dmmu_tlb

Top level modules:
        or1200_dmmu_tlb

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_lsu.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_lsu.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_lsu

Top level modules:
        or1200_lsu

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_dpram_32x32.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_dpram_32x32.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_dpram_32x32

Top level modules:
        or1200_dpram_32x32

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_ic_top.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_ic_top.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_ic_top

Top level modules:
        or1200_ic_top

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_spram_1024x32.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_spram_1024x32.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_spram_1024x32

Top level modules:
        or1200_spram_1024x32

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_reg2mem.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_reg2mem.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_reg2mem

Top level modules:
        or1200_reg2mem

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_rf.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_rf.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_rf

Top level modules:
        or1200_rf

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_spram_64x14.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_spram_64x14.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_spram_64x14

Top level modules:
        or1200_spram_64x14

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_mult_mac.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_mult_mac.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_mult_mac

Top level modules:
        or1200_mult_mac

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_dc_fsm.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_dc_fsm.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_dc_fsm

Top level modules:
        or1200_dc_fsm

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_spram_2048x32.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_spram_2048x32.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_spram_2048x32

Top level modules:
        or1200_spram_2048x32

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_pm.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_pm.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_pm

Top level modules:
        or1200_pm

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_ic_tag.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_ic_tag.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_ic_tag

Top level modules:
        or1200_ic_tag

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_cpu.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_cpu.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_cpu

Top level modules:
        or1200_cpu

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_top.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_top.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_top

Top level modules:
        or1200_top

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_rfram_generic.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_rfram_generic.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_rfram_generic

Top level modules:
        or1200_rfram_generic

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_tpram_32x32.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_tpram_32x32.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_tpram_32x32

Top level modules:
        or1200_tpram_32x32

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_dc_ram.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_dc_ram.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_dc_ram

Top level modules:
        or1200_dc_ram

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_freeze.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_freeze.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_freeze

Top level modules:
        or1200_freeze

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_gmultp2_32x32.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_gmultp2_32x32.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_gmultp2_32x32

Top level modules:
        or1200_gmultp2_32x32

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_pic.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_pic.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_pic

Top level modules:
        or1200_pic

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_genpc.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_genpc.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_genpc

Top level modules:
        or1200_genpc

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_sb.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_sb.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_sb

Top level modules:
        or1200_sb

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_wb_biu.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_wb_biu.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_wb_biu

Top level modules:
        or1200_wb_biu

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_sb_fifo.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_sb_fifo.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_sb_fifo

Top level modules:
        or1200_sb_fifo

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_xcv_ram32x8d.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_xcv_ram32x8d.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_qmem_top.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_qmem_top.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_qmem_top

Top level modules:
        or1200_qmem_top

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_spram_64x24.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_spram_64x24.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_spram_64x24

Top level modules:
        or1200_spram_64x24

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_operandmuxes.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_operandmuxes.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_operandmuxes

Top level modules:
        or1200_operandmuxes

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_spram_2048x32_bw.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_spram_2048x32_bw.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_spram_2048x32_bw

Top level modules:
        or1200_spram_2048x32_bw

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_if.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_if.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_if

Top level modules:
        or1200_if

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_mem2reg.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_mem2reg.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_mem2reg

Top level modules:
        or1200_mem2reg

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_tt.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_tt.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_tt

Top level modules:
        or1200_tt

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_dc_top.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_dc_top.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_dc_top

Top level modules:
        or1200_dc_top

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_du.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_du.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_du

Top level modules:
        or1200_du

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_ic_fsm.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_ic_fsm.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_ic_fsm

Top level modules:
        or1200_ic_fsm

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_alu.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_alu.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_alu

Top level modules:
        or1200_alu

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_immu_top.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_immu_top.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_immu_top

Top level modules:
        or1200_immu_top

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_spram_128x32.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_spram_128x32.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_spram_128x32

Top level modules:
        or1200_spram_128x32

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_spram_512x20.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_spram_512x20.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_spram_512x20

Top level modules:
        or1200_spram_512x20

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_ctrl.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_ctrl.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_ctrl

Top level modules:
        or1200_ctrl

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_sprs.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_sprs.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_sprs

Top level modules:
        or1200_sprs

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_immu_tlb.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_immu_tlb.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_immu_tlb

Top level modules:
        or1200_immu_tlb

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_spram_1024x8.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_spram_1024x8.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_spram_1024x8

Top level modules:
        or1200_spram_1024x8

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_dc_tag.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_dc_tag.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_dc_tag

Top level modules:
        or1200_dc_tag

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_cfgr.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_cfgr.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_cfgr

Top level modules:
        or1200_cfgr

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_wbmux.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_wbmux.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_wbmux

Top level modules:
        or1200_wbmux

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_ic_ram.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_ic_ram.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_ic_ram

Top level modules:
        or1200_ic_ram

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_spram_1024x32_bw.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_spram_1024x32_bw.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_spram_1024x32_bw

Top level modules:
        or1200_spram_1024x32_bw

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_amultp2_32x32.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_amultp2_32x32.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_except.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_except.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_except

Top level modules:
        or1200_except

} {} {}} C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_spram_256x21.v {1 {vlog -work or1200 +incdir+../src -nocovercells C:/qaz/_CVS_WORK/units/or1k/or1200/rtl/verilog/or1200_spram_256x21.v
Model Technology ModelSim ALTERA vlog 6.4a Compiler 2008.08 Oct 22 2008
-- Compiling module or1200_spram_256x21

Top level modules:
        or1200_spram_256x21

} {} {}}

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