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//////////////////////////////////////////////////////////////////////
////                                                              ////
////  OR1200's Top level multiplier and MAC                       ////
////                                                              ////
////  This file is part of the OpenRISC 1200 project              ////
////  http://www.opencores.org/cores/or1k/                        ////
////                                                              ////
////  Description                                                 ////
////  Multiplier is 32x32 however multiply instructions only      ////
////  use lower 32 bits of the result. MAC is 32x32=64+64.        ////
////                                                              ////
////  To Do:                                                      ////
////   - make it smaller and faster                               ////
////                                                              ////
////  Author(s):                                                  ////
////      - Damjan Lampret, lampret@opencores.org                 ////
////                                                              ////
//////////////////////////////////////////////////////////////////////
////                                                              ////
//// Copyright (C) 2000 Authors and OPENCORES.ORG                 ////
////                                                              ////
//// This source file may be used and distributed without         ////
//// restriction provided that this copyright statement is not    ////
//// removed from the file and that any derivative work contains  ////
//// the original copyright notice and the associated disclaimer. ////
////                                                              ////
//// This source file is free software; you can redistribute it   ////
//// and/or modify it under the terms of the GNU Lesser General   ////
//// Public License as published by the Free Software Foundation; ////
//// either version 2.1 of the License, or (at your option) any   ////
//// later version.                                               ////
////                                                              ////
//// This source is distributed in the hope that it will be       ////
//// useful, but WITHOUT ANY WARRANTY; without even the implied   ////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////
//// PURPOSE.  See the GNU Lesser General Public License for more ////
//// details.                                                     ////
////                                                              ////
//// You should have received a copy of the GNU Lesser General    ////
//// Public License along with this source; if not, download it   ////
//// from http://www.opencores.org/lgpl.shtml                     ////
////                                                              ////
//////////////////////////////////////////////////////////////////////
//
// CVS Revision History
//
// $Log: not supported by cvs2svn $
// Revision 1.2  2001/10/14 13:12:09  lampret
// MP3 version.
//
// Revision 1.1.1.1  2001/10/06 10:18:38  igorm
// no message
//
//
 
// synopsys translate_off
`include "timescale.v"
// synopsys translate_on
`include "defines.v"
 
module mult_mac(clk, rst, id_macrc_op, macrc_op, a, b, alu_op, result, mac_stall_r);
 
parameter width = `OPERAND_WIDTH;
 
//
// I/O
//
input				clk;
input				rst;
input				id_macrc_op;
input				macrc_op;
input	[width-1:0]		a;
input	[width-1:0]		b;
input	[`ALUOP_WIDTH-1:0]	alu_op;
output	[width-1:0]		result;
output				mac_stall_r;
 
//
// Internal wires and regs
//
wire	[width-1:0]		result;
reg	[2*width-1:0]		mul_prod_r;
reg	[2*width-1:0]		mac_r;
wire	[2*width-1:0]		mul_prod;
wire				mac_op;
reg				mac_op_r1;
reg				mac_op_r2;
reg				mac_op_r3;
reg				mac_stall_r;
 
//
// Combinatorial logic
//
assign result = (alu_op == `ALUOP_MUL) ? mul_prod_r[31:0] : mac_r[59:28];
assign mac_op = (alu_op == `ALUOP_MAC);
 
//
// Instantiation of the multiplier
//
multp2_32x32 multp2_32x32(
	.X(a),
	.Y(b),
	.RST(rst),
	.CLK(clk),
	.P(mul_prod)
);
 
//
// Registered output from the multiplier
//
always @(posedge rst or posedge clk)
	if (rst)
		mul_prod_r <= #1 64'h0000_0000_0000_0000;
	else
		mul_prod_r <= #1 mul_prod[63:0];
 
//
// Propagation of l.mac opcode
//
always @(posedge clk or posedge rst)
	if (rst)
		mac_op_r1 <= #1 1'b0;
	else
		mac_op_r1 <= #1 mac_op;
 
//
// Propagation of l.mac opcode
//
always @(posedge clk or posedge rst)
	if (rst)
		mac_op_r2 <= #1 1'b0;
	else
		mac_op_r2 <= #1 mac_op_r1;
 
//
// Propagation of l.mac opcode
//
always @(posedge clk or posedge rst)
	if (rst)
		mac_op_r3 <= #1 1'b0;
	else
		mac_op_r3 <= #1 mac_op_r2;
 
//
// Implementation of MAC
//
always @(posedge rst or posedge clk)
	if (rst)
		mac_r <= #1 64'h0000_0000_0000_0000;
	else if (mac_op_r3)
		mac_r <= #1 mac_r + mul_prod_r;
	else if (macrc_op)
		mac_r <= #1 64'h0000_0000_0000_0000;
 
//
// Stall CPU if l.macrc is in ID and MAC still has to process l.mac instructions
// in EX stage (e.g. inside multiplier)
//
always @(posedge rst or posedge clk)
	if (rst)
		mac_stall_r <= #1 1'b0;
	else
		mac_stall_r <= #1 (mac_op | mac_op_r1 | mac_op_r2) & id_macrc_op;
 
endmodule