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/* Definitions to target GDB to or1k targets.
   Copyright 2001 Free Software Foundation, Inc.
 
   This file is part of GDB.
 
   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 2 of the License, or
   (at your option) any later version.
 
   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.
 
   You should have received a copy of the GNU General Public License
   along with this program; if not, write to the Free Software
   Foundation, Inc., 59 Temple Place - Suite 330,
   Boston, MA 02111-1307, USA.  */
 
#ifndef TM_OR1K_H
#define TM_OR1K_H
 
#ifndef TARGET_OR1K
#define TARGET_OR1K
#endif
 
struct value;
 
struct struct_or1k_implementation
  {
    /* Implementation version.  */
    unsigned int VR;
    /* Units present.  */
    unsigned int UPR;
    /* Number of total available matchpoints in this implementation.  */
    unsigned int num_matchpoints;
    /* Number of registers.  */
    unsigned int num_gpr_regs;
    unsigned int num_vf_regs;
    int vf_present;
 };
 
struct or1k_target_ops
  {
    /* Name this target type.  */
    char *to_shortname;
 
    /* Init target.  */
    void (*to_init) PARAMS ((char *args));
    /* Destruct target.  */
    void (*to_done) PARAMS ((void));
 
    /* Read SPR register.  
       Does not fail, places error no. in err instead or call error().  */
    unsigned int (*to_read_spr_reg) PARAMS ((unsigned int regno));
    /* Write SPR register.  
       Does not fail, places error no. in err instead or call error().  */
    void (*to_write_spr_reg) PARAMS ((unsigned int regno, unsigned int value));
 
    /* Read TAP register.  
       Does not fail, places error no. in err instead or call error().  */
    unsigned int (*to_read_tap_reg) PARAMS ((unsigned int regno));
    /* Write TAP register.  
       Does not fail, places error no. in err instead or call error().  */
    void (*to_write_tap_reg) PARAMS ((unsigned int regno, unsigned int value));
 
    /* Executes extended command on the target.  */
    void (*to_exec_command) PARAMS ((char *args, int from_tty));
 
    /* Associated target_ops.  */
    struct target_ops *gdb_ops;
    /* Should be OPS_MAGIC. */
    int to_magic;
  };
 
 
#define DEFAULT_PROMPT "(or1k) "
 
/* Special purpose regisers.  */
#define SPR_GROUP_SIZE_BITS (16)
#define SPR_GROUP_SIZE (1 << SPR_GROUP_SIZE_BITS)
#define SPR_SYSTEM_GROUP (0)
#define SPR_DEBUG_GROUP (6)
#define SPR_GPR  (24)
#define SPR_VFPR (24+32)
#define OR1K_NUM_SPR_GROUPS 11
 
/* Define register values.  */
#define SPR_REG(group, index) (((group) << SPR_GROUP_SIZE_BITS) + (index))
 
#define VR_SPRNUM SPR_REG(SPR_SYSTEM_GROUP, 1)
#define UPR_SPRNUM SPR_REG(SPR_SYSTEM_GROUP, 2)
#define SR_SPRNUM SPR_REG(SPR_SYSTEM_GROUP, 3)
#define CCR_SPRNUM(cid) SPR_REG(SPR_SYSTEM_GROUP, 4+cid)
#define DVR0_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 0)
#define DCR0_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 8)
#define DMR1_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 16)
#define DMR2_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 17)
#define DCWR0_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 18)
#define DCWR1_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 19)
#define DSR_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 20)
#define DRR_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 21)
#define PC_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 22)
#define ZERO_REGNUM (0)
#define SP_REGNUM (1)
#define FP_REGNUM (2)
#define A0_REGNUM (3)
#define A5_REGNUM (8)
#define LR_REGNUM (9)
#define RV_REGNUM (11)
#define VFA0_REGNUM (32+0)
#define VFA5_REGNUM (32+5)
#define VFRV_REGNUM (32+6)
#define PC_REGNUM (64+0)
#define PS_REGNUM (64+1)
#define CCR_REGNUM (64+2)
 
extern int or1k_regnum_to_sprnum PARAMS ((int regno));
#define REGNUM_TO_SPRNUM(regno) (or1k_regnum_to_sprnum(regno))
 
/* Defines for SPR bits.  */
#define DMR1_ST    (0x00400000)
 
#define DRR_BE     (0x00000001)
#define DRR_SCE    (0x00000002)
#define DRR_RE     (0x00000004)
#define DRR_IME    (0x00000008)
#define DRR_DME    (0x00000010)
#define DRR_HPINTE (0x00000020)
#define DRR_IIE    (0x00000040)
#define DRR_AE     (0x00000080)
#define DRR_LPINTE (0x00000100)
#define DRR_IPFE   (0x00000200)
#define DRR_DPFE   (0x00000400)
#define DRR_BUSEE  (0x00000800)
#define DRR_RSTE   (0x00001000)
 
/* Number of matchpoints */
 
#define NUM_MATCHPOINTS (or1k_implementation.num_matchpoints)
 
/* Number of machine GPR registers */
 
#define NUM_GPR_REGS (or1k_implementation.num_gpr_regs)
#define MAX_GPR_REGS (32)
 
/* Number of machine VF registers */
 
#define NUM_VF_REGS (or1k_implementation.num_vf_regs)
#define MAX_VF_REGS (32)
 
/* gdb mapping of registers */
#ifndef NUM_REGS
#define NUM_REGS (MAX_GPR_REGS+MAX_VF_REGS+3)
#endif
 
/* Can act like a little or big endian.  */
 
#if !defined (TARGET_BYTE_ORDER_DEFAULT)
#define TARGET_BYTE_ORDER_DEFAULT BIG_ENDIAN
#define TARGET_BYTE_ORDER_SELECTABLE_P (1)
#endif
 
/* Size (in bytes) of registers.  */
 
#define OR1K_SPR_REGSIZE (4)
#define OR1K_VF_REGSIZE (8)
#define OR1K_GPR_REGSIZE ((OR1K_64BIT_IMPLEMENTATION)?(8):(4))
 
#define OR1K_IS_GPR(N) ((N) >= 0 && (N) < NUM_GPR_REGS)
#define OR1K_IS_VF(N) ((N) >= NUM_GPR_REGS && (N) < NUM_GPR_REGS + NUM_VF_REGS)
 
/* Register representation is the same as in memory.  */
 
#define REGISTER_CONVERTIBLE(N) (0)
 
/* Given the register index, return the name of the corresponding
   register. */
 
extern char *or1k_register_name PARAMS ((int regno));
#define REGISTER_NAME(regno) or1k_register_name (regno)
 
/* Is this implementation 64 or 32 bit. 
   WARNING: gdb or1k port is not yet prepared for 64b implementations!  */
#define OR1K_64BIT_IMPLEMENTATION 0
 
/* Number of bytes of storage in the actual machine representation for
   register N.  NOTE: This indirectly defines the register size
   transfered by the GDB protocol.  If we have 64bit processor
   implementation, GPR register raw size is 8B, otherwise 4B.  */
#define REGISTER_RAW_SIZE(N) ((OR1K_IS_GPR(N)?((OR1K_64BIT_IMPLEMENTATION)?\
(8):(4)):(OR1K_SPR_REGSIZE)))
 
/* Number of bytes of storage in the program's representation
   for register N. Same as RAW_SIZE.  */
 
#define REGISTER_VIRTUAL_SIZE(N) TYPE_LENGTH (REGISTER_VIRTUAL_TYPE (N))
 
/* Return the GDB type object for the "standard" data type of data in
   register N.  */
 
#ifndef REGISTER_VIRTUAL_TYPE
#define REGISTER_VIRTUAL_TYPE(N) ((OR1K_IS_GPR(N))?(\
(OR1K_64BIT_IMPLEMENTATION)?(builtin_type_int64):(builtin_type_int)\
):(builtin_type_uint32))
#endif
 
 
/* Largest value REGISTER_RAW_SIZE can have.  */
 
#define MAX_REGISTER_RAW_SIZE ((OR1K_64BIT_IMPLEMENTATION)?(8):(4))
 
/* Largest value REGISTER_VIRTUAL_SIZE can have.  */
 
#define MAX_REGISTER_VIRTUAL_SIZE ((OR1K_64BIT_IMPLEMENTATION)?(8):(4))
 
#define REGISTER_SIZE (MAX_REGISTER_VIRTUAL_SIZE)
 
/* ABI uses R3 through R8 for args.  */
#define OR1K_LAST_ARG_REGNUM (A5_REGNUM)
#define OR1K_NUM_ARG_REGS (6)
/* ABI uses VFR0 through VFR5 for float args.  */
#define OR1K_LAST_FP_ARG_REGNUM (VFA5_REGNUM)
#define OR1K_NUM_FP_ARG_REGS (6)
 
/* Should not store into R0.  */
 
#define CANNOT_STORE_REGISTER(N) ((N) == 0)
 
/* Index within `registers' of the first byte of the space for
   register N.  */
 
#define REGISTER_BYTE(N) ((N) * OR1K_SPR_REGSIZE)
 
/* Total amount of space needed to store our copies of the machine's
   register state, the array `registers'.  */
 
#define REGISTER_BYTES (NUM_REGS * OR1K_SPR_REGSIZE)
 
/* BREAKPOINT_FROM_PC uses the program counter value to determine whether a
   16- or 32-bit breakpoint should be used.  It returns a pointer
   to a string of bytes that encode a breakpoint instruction, stores
   the length of the string to *lenptr, and adjusts the pc (if necessary) to
   point to the actual memory location where the breakpoint should be
   inserted.  */
extern unsigned char *or1k_breakpoint_from_pc PARAMS ((CORE_ADDR *bp_addr, int *bp_size));
#define BREAKPOINT_FROM_PC(pcptr, lenptr) or1k_breakpoint_from_pc (pcptr, lenptr)
 
/* Amount PC must be decremented by after a breakpoint.
   This is often the number of bytes in BREAKPOINT
   but not always.  */
 
#define DECR_PC_AFTER_BREAK 0
 
/* Amount PC must be decremented by after a breakpoint.
   This is often the number of bytes in BREAKPOINT
   but not always.  */
 
#define DECR_PC_AFTER_BREAK 0
 
/* Extract from an array REGBUF containing the (raw) register state
   a function return value of type TYPE, and copy that, in virtual format,
   into VALBUF.  */
 
extern void or1k_extract_return_value PARAMS ((struct type *, char[], char *));
#define EXTRACT_RETURN_VALUE(TYPE, REGBUF, VALBUF) \
  or1k_extract_return_value (TYPE, REGBUF, VALBUF)
 
/* Write into appropriate registers a function return value
   of type TYPE, given in virtual format.  */
 
#define STORE_RETURN_VALUE(TYPE,VALBUF) \
  {\
    if (TYPE_CODE (TYPE) == TYPE_CODE_FLT)\
      write_register_bytes (REGISTER_BYTE (VFRV_REGNUM), VALBUF, TYPE_LENGTH (TYPE));\
    else\
      write_register_bytes (REGISTER_BYTE (RV_REGNUM), VALBUF, TYPE_LENGTH (TYPE));\
  }
 
/* Extract from an array REGBUF containing the (raw) register state
   the address in which a function should return its structure value,
   as a CORE_ADDR (or an expression that can be used as one).  */
/* The address is passed in a0 upon entry to the function, but when
   the function exits, the compiler has copied the value to v0.  This
   convention is specified by the System V ABI, so I think we can rely
   on it.  */
 
#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
  (extract_address (REGBUF + REGISTER_BYTE (RV_REGNUM), \
		    REGISTER_RAW_SIZE (RV_REGNUM)))
 
#define EXTRACT_STRUCT_VALUE_ADDRESS_P 1
 
/* Advance PC across any function entry prologue instructions
   to reach some "real" code.  */
extern CORE_ADDR or1k_skip_prologue PARAMS ((CORE_ADDR addr));
#define SKIP_PROLOGUE(pc) (or1k_skip_prologue (pc))
 
/* FRAMES */
 
#define FRAME_ARGS_ADDRESS(fi)	(fi)->frame
 
#define FRAME_LOCALS_ADDRESS(fi) (fi)->frame
 
/* FRAME_CHAIN takes a frame's nominal address
   and produces the frame's chain-pointer. */
 
#define FRAME_CHAIN(thisframe) (CORE_ADDR) or1k_frame_chain (thisframe)
extern CORE_ADDR or1k_frame_chain PARAMS ((struct frame_info *));
 
/* Discard from the stack the innermost frame, restoring all registers.  */
 
extern void or1k_pop_frame PARAMS ((void));
#define POP_FRAME or1k_pop_frame()
 
 
/* Return number of args passed to a frame.
   Can return -1, meaning no way to tell.  */
 
#define FRAME_NUM_ARGS(fi)	(-1)
 
/* Return number of bytes at start of arglist that are not really args.  */
 
#define FRAME_ARGS_SKIP 0
 
/* Put here the code to store, into a struct frame_saved_regs,
   the addresses of the saved registers of frame described by FRAME_INFO.
   This includes special registers such as pc and fp saved in special
   ways in the stack frame.  sp is even more special:
   the address we return for it IS the sp for the next frame.  */
 
extern void or1k_init_saved_regs PARAMS ((struct frame_info *));
#define FRAME_INIT_SAVED_REGS(frame_info) or1k_init_saved_regs (frame_info);
 
/* Saved Pc.  */
 
extern CORE_ADDR or1k_frame_saved_pc PARAMS ((struct frame_info *));
#define FRAME_SAVED_PC(FRAME) (or1k_frame_saved_pc(FRAME))
 
/* Set the return address register to point to the entry
   point of the program, where a breakpoint lies in wait.  */
 
extern CORE_ADDR or1k_push_return_address PARAMS ((CORE_ADDR pc, CORE_ADDR sp));
#define PUSH_RETURN_ADDRESS(PC, SP) (or1k_push_return_address ((PC), (SP)))
 
/* Immediately after a function call, return the saved pc.
   Can't always go through the frames for this because on some machines
   the new frame is not set up until the new function executes
   some instructions.  */
 
#define SAVED_PC_AFTER_CALL(frame)	read_register(LR_REGNUM)
 
/* Offset from address of function to start of its code.
   Zero on most machines.  */
 
#define FUNCTION_START_OFFSET (0)
 
/* Floating point is IEEE compliant */
#define IEEE_FLOAT
 
/* Is floating/vector unit present.  */
#define OR1K_VF_PRESENT (or1k_implementation.vf_present)
 
#define INIT_FRAME_PC		/* Not necessary */
 
/* Stack grows downward.  */
#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
 
/* Size of stack entry - in bytes.  */ 
#define OR1K_STACK_ALIGN (8)
/* Maximum struct size, that is still stored onto stack.  */
#define OR1K_STRUCT_CONV_SIZE (8)
#define STACK_ALIGN(addr) OR1K_STACK_ALIGN
 
#define USE_STRUCT_CONVENTION(gcc_p, type) (TYPE_LENGTH (type) > OR1K_STRUCT_CONV_SIZE)
 
/* Stack must be aligned on 32-bit boundaries when synthesizing
   function calls. PUSH_ARGUMENTS will handle it. */
extern CORE_ADDR or1k_push_arguments PARAMS ((int, struct value **, CORE_ADDR, int, CORE_ADDR));
#define PUSH_ARGUMENTS(nargs, args, sp, struct_return, struct_addr) \
(or1k_push_arguments((nargs), (args), (sp), (struct_return), (struct_addr)))
 
/* Return non-zero if PC points to an instruction which will cause a step
   to execute both the instruction at PC and an instruction at PC+4.  */
extern int or1k_step_skips_delay PARAMS ((CORE_ADDR));
#define STEP_SKIPS_DELAY_P (1)
#define STEP_SKIPS_DELAY(pc) (or1k_step_skips_delay (pc))
 
/* DUMMY CALLS */
#define USE_GENERIC_DUMMY_FRAMES 1
#define CALL_DUMMY                   {0}
#define CALL_DUMMY_START_OFFSET      (0)
#define CALL_DUMMY_BREAKPOINT_OFFSET (0)
#define SIZEOF_CALL_DUMMY_WORDS      (0)
#define CALL_DUMMY_LOCATION          AT_ENTRY_POINT
#define FIX_CALL_DUMMY(DUMMY, START, FUNADDR, NARGS, ARGS, TYPE, GCCP) 
 
/* Return a location where we can set a breakpoint that will be hit
   when an inferior function call returns.  This is normally the
   program's entry point.  */
#define CALL_DUMMY_ADDRESS()         entry_point_address ()
#define SAVE_DUMMY_FRAME_TOS(SP)     generic_save_dummy_frame_tos (SP)
#define PC_IN_CALL_DUMMY(PC, SP, FP) generic_pc_in_call_dummy (PC, SP, FP)
#define PUSH_DUMMY_FRAME	     generic_push_dummy_frame ()
 
/* Definitions and declarations used by or1k dependent files.  */
#define OR1K_INSTLEN 4		/* Length of an instruction */
typedef unsigned long t_inst;	/* Integer big enough to hold an instruction */
 
 
 
/* Defined in remote-or1k.c */
 
/* Target state names.  */
extern const char *status_name[];
/* Target state.  */
enum target_status
  {
    TARGET_UNDEFINED,
    TARGET_CONNECTING,
    TARGET_DISCONNECTING,
    TARGET_RUNNING,
    TARGET_STOPPED
  };
 
#define REG_SPACE 0x00000000
#define REG_SPACE_END 0x7FFFFFFF
#define MEM_SPACE 0x80000000
#define MEM_SPACE_END 0xFFFFFFFF
 
/* Compare conditions for DCRx registers.  */ 
 
enum enum_compare_condition
  {
    CC_MASKED, CC_EQUAL, CC_LESS, CC_LESSE, CC_GREATE, CC_NEQUAL
  };
 
/* Compare operand to compare DVRx to.  */
 
enum enum_compare_to
  {
    CT_DISABLED, CT_FETCH, CT_LEA, CT_SEA, CT_LDATA, CT_SDATA
  };
 
 
/* DRCx struct */
struct dcr_struct
  {
    int dp:1;
    enum enum_compare_condition cc:3;
    int sc:1;
    enum enum_compare_to ct:3;
  };
 
/* Possible errors are listed here.  */
 
enum enum_errors
  {
    ERR_NONE, ERR_CRC
  };
 
extern const char *or1k_err_name PARAMS ((int e));
 
extern struct struct_or1k_implementation or1k_implementation;
extern unsigned int or1k_fetch_instruction PARAMS ((CORE_ADDR addr));
extern void or1k_fetch_registers PARAMS ((int regno));
 
/* Sets register/memory regno to data.  */
extern void or1k_write_reg PARAMS ((unsigned int regno, unsigned int data));
 
/* Sets register/memory regno to data.  */
extern unsigned int or1k_read_reg PARAMS ((unsigned int regno));
extern int err;
 
#endif /* TM_OR1K_H */