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/* dma.h -- Definition of types and structures for DMA
   Copyright (C) 2001 by Erez Volk, erez@opencores.org
 
   This file is part of OpenRISC 1000 Architectural Simulator.
 
   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 2 of the License, or
   (at your option) any later version.
 
   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.
 
   You should have received a copy of the GNU General Public License
   along with this program; if not, write to the Free Software
   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
 
#include "dma_defs.h"
 
/* Exported function prototypes */
void dma_reset( void );
void dma_clock( void );
void dma_status( void );
 
void set_dma_req_i( unsigned dma_controller, unsigned channel );
void clear_dma_req_i( unsigned dma_controller, unsigned channel );
void set_dma_nd_i( unsigned dma_controller, unsigned channel );
void clear_dma_nd_i( unsigned dma_controller, unsigned channel );
unsigned check_dma_ack_o( unsigned dma_controller, unsigned channel );
 
/* Implementation of DMA Channel Registers and State */
struct dma_channel
{
  /* The controller we belong to */
  struct dma_controller *controller;
 
  /* Our channel number and bit mask */
  unsigned channel_number;
  unsigned long channel_mask;
 
  /* Used for dump, to save dumping all 32 channels */
  unsigned referenced;
 
  /* Inner state of transfer etc. */
  unsigned load_next_descriptor_when_done;
  unsigned long current_descriptor;
  unsigned long source, destination, source_mask, destination_mask;
  unsigned long chunk_size, total_size, words_transferred;
 
  /* The interface registers */
  struct 
  {
    unsigned long csr;
    unsigned long sz;
    unsigned long a0;
    unsigned long am0;
    unsigned long a1;
    unsigned long am1;
    unsigned long desc;
    unsigned long swptr;
  } regs;
 
  /* Some control signals */
  unsigned dma_req_i;
  unsigned dma_ack_o;
  unsigned dma_nd_i;
};
 
 
/* Implementation of DMA Controller Registers and State */
struct dma_controller
{
  /* Base address in memory */
  oraddr_t baseaddr;
 
  /* Which interrupt number we generate */
  unsigned irq;
 
  /* Controller Registers */
  struct 
  {
    unsigned long csr;
    unsigned long int_msk_a;
    unsigned long int_msk_b;
    unsigned long int_src_a;
    unsigned long int_src_b;
  } regs;
 
  /* Channels */
  struct dma_channel ch[DMA_NUM_CHANNELS];
};