URL
https://opencores.org/ocsvn/or1k/or1k/trunk
Subversion Repositories or1k
[/] [or1k/] [branches/] [stable_0_1_x/] [or1ksim/] [tick/] [tick.c] - Rev 189
Go to most recent revision | Compare with Previous | Blame | View Log
/* tick.c -- Simulation of OpenRISC 1000 tick timer Copyright (C) 1999 Damjan Lampret, lampret@opencores.org This file is part of OpenRISC 1000 Architectural Simulator. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ /* This is functional simulation of OpenRISC 1000 architectural tick timer. */ #include <stdlib.h> #include <stdio.h> #include <string.h> #include "tick.h" #include "../cpu/or1k/spr_defs.h" #include "pic.h" #include "sprs.h" /* For mode 10 only: timer stops until we write into TTCR. */ int tt_stopped = 0; /* Reset. It initializes TTCR register. */ void tick_reset() { printf("Resetting Tick Timer.\n"); mtspr(SPR_TTCR, 0); mtspr(SPR_TTMR, 0); tt_stopped = 0; } /* Simulation hook. Must be called every clock cycle to simulate tick timer. It does internal functional tick timer simulation. */ void tick_clock() { unsigned long ttcr; unsigned long ttmr; ttcr = mfspr(SPR_TTCR); ttmr = mfspr(SPR_TTMR); if (!(ttmr & SPR_TTMR_M) || tt_stopped) return; if ((ttcr & SPR_TTCR_PERIOD) == (ttmr & SPR_TTMR_PERIOD)) { int mode = (ttmr & SPR_TTMR_M) >> 30; /* CZ 04/09/01 */ if (ttmr & SPR_TTMR_IE) { setsprbits(SPR_TTMR, SPR_TTMR_IP, 1); report_interrupt(INT_TICK); } /* Handle the modes properly.. CZ 04/09/01 */ switch(mode) { case 0: /* Timer is disabled */ tt_stopped = 1; break; case 1: /* Timer should auto restart */ ttcr = 0; mtspr(SPR_TTCR,ttcr); break; case 2: /* Pause the timer */ tt_stopped = 1; break; case 3: /* Timer keeps running */ break; } } if (!tt_stopped) ttcr++; mtspr(SPR_TTCR, ttcr); }
Go to most recent revision | Compare with Previous | Blame | View Log