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/* pic.c -- Simulation of OpenRISC 1000 programmable interrupt controller
   Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
 
This file is part of OpenRISC 1000 Architectural Simulator.
 
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
 
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.
 
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
 
/* This is functional simulation of OpenRISC 1000 architectural
   programmable interrupt controller.
*/
 
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
 
#include "pic.h"
#include "spr_defs.h"
#include "except.h"
#include "sprs.h"
 
extern int cont_run;
 
/* Reset. It initializes PIC registers. */
void pic_reset()
{
  printf("Resetting PIC.\n");
  mtspr(SPR_PICMR, 0);
  mtspr(SPR_PICPR, 0);
  mtspr(SPR_PICSR, 0);
}
 
/* Simulation hook. Must be called every clock cycle to simulate PIC
   It does internal functional PIC simulation. */
inline void pic_clock()
{
  unsigned long picsr;
  unsigned long sr;
 
  /* From Sections 16.3 & 16.4, bits 0 & 1 are reserved */
  picsr = mfspr(SPR_PICSR);
  sr = mfspr(SPR_SR);
 
  /* Don't do anything if interrupts not currently enabled or 
     higher priority exception was allready reported */
  if(((sr & SPR_SR_IEE) != SPR_SR_IEE) || pending.valid)
    return;
 
  if(picsr)
    except_handle(EXCEPT_INT, mfspr(SPR_EEAR_BASE));
}
 
/* Asserts interrupt to the PIC. */
void report_interrupt(int line)
{
  setsprbits(SPR_PMR, SPR_PMR_DME, 0); /* Disable doze mode */
  setsprbits(SPR_PMR, SPR_PMR_SME, 0); /* Disable sleep mode */
 
  debug(4, "Asserting interrupt %d.\n", line);
 
  if (getsprbit(SPR_PICMR, line) || line < 2)
  setsprbit(SPR_PICSR, line, 1);
}