OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [first/] [mp3/] [syn/] [design_compiler/] [bin/] [read_design.inc] - Rev 1765

Compare with Previous | Blame | View Log

/* Set search path for verilog include files */
search_path = search_path + RTL_PATH + { GATE_PATH }

/* Read verilog files of the RTC IP core */
if (TOPLEVEL == "xfpga_top") {
        read -f verilog tcop_top.v
        read -f verilog xfpga_top.v

        read -f verilog audio_codec_if.v
        read -f verilog audio_top.v
        read -f verilog audio_wb_if.v
        read -f verilog fifo_4095_16.v
        read -f verilog fifo_empty_16.v

        read -f verilog dbg_crc8_d1.v
        read -f verilog dbg_defines.v
        read -f verilog dbg_register.v
        read -f verilog dbg_registers.v
        read -f verilog dbg_sync_clk1_clk2.v
        read -f verilog dbg_timescale.v
        read -f verilog dbg_top.v
        read -f verilog dbg_trace.v

        read -f verilog flash_top.v
        read -f verilog sram_top.v

        read -f verilog alu.v
        read -f verilog cfgr.v
        read -f verilog cpu.v
        read -f verilog dc.v
        read -f verilog dc_fsm.v
        read -f verilog dc_ram.v
        read -f verilog dc_tag.v
        read -f verilog defines.v
        read -f verilog dmmu.v
        read -f verilog dtlb.v
        read -f verilog du.v
        read -f verilog except.v
        read -f verilog frz_logic.v
        read -f verilog generic_dpram_32x32.v
        read -f verilog generic_multp2_32x32.v
        read -f verilog generic_spram_2048x32.v
        read -f verilog generic_spram_2048x8.v
        read -f verilog generic_spram_512x19.v
        read -f verilog generic_spram_512x20.v
        read -f verilog generic_spram_64x14.v
        read -f verilog generic_spram_64x21.v
        read -f verilog generic_spram_64x23.v
        read -f verilog generic_spram_64x37.v
        read -f verilog generic_tpram_32x32.v
        read -f verilog ic.v
        read -f verilog ic_fsm.v
        read -f verilog ic_ram.v
        read -f verilog ic_tag.v
        read -f verilog id.v
        read -f verilog ifetch.v
        read -f verilog immu.v
        read -f verilog itlb.v
        read -f verilog lsu.v
        read -f verilog mem2reg.v
        read -f verilog mult_mac.v
        read -f verilog operandmuxes.v
        read -f verilog or1200.v
        read -f verilog pic.v
        read -f verilog pm.v
        read -f verilog reg2mem.v
        read -f verilog rf.v
        read -f verilog sprs.v
        read -f verilog tt.v
        read -f verilog wb_biu.v
        read -f verilog wbmux.v

        read -f verilog xcv_ram32x8d.v

        read -f verilog crtc_iob.v
        read -f verilog ssvga_crtc.v
        read -f verilog ssvga_defines.v
        read -f verilog ssvga_fifo.v
        read -f verilog ssvga_top.v
        read -f verilog ssvga_wbm_if.v
        read -f verilog ssvga_wbs_if.v

} else {
        echo "Non-existing top level."
        exit
}

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.