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[/] [or1k/] [tags/] [nog_patch_38/] [or1ksim/] [tick/] [tick.c] - Rev 133

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/* tick.c -- Simulation of OpenRISC 1000 tick timer
   Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
 
This file is part of OpenRISC 1000 Architectural Simulator.
 
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
 
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.
 
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
 
/* This is functional simulation of OpenRISC 1000 architectural
   tick timer.
*/
 
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
 
#include "tick.h"
#include "../cpu/or1k/spr_defs.h"
#include "pic.h"
 
/* For mode 10 only: timer stops until we write into TTCR.  */
int tt_stopped = 0;
 
/* Reset. It initializes TTCR register. */
void tick_reset()
{
  printf("Resetting Tick Timer.\n");
  mtspr(SPR_TTCR, 0);
  mtspr(SPR_TTMR, 0);
  tt_stopped = 0;
}
 
/* Simulation hook. Must be called every clock cycle to simulate tick
   timer. It does internal functional tick timer simulation. */
void tick_clock()
{
  unsigned long ttcr;
  unsigned long ttmr;
 
  ttcr = mfspr(SPR_TTCR);
  ttmr = mfspr(SPR_TTMR);
 
  if (!(ttmr & SPR_TTMR_M) || tt_stopped)
    return;
 
  if ((ttcr & SPR_TTCR_PERIOD) == (ttmr & SPR_TTMR_PERIOD)) {
    if (ttmr & SPR_TTMR_IE) {
      setsprbits(SPR_TTMR, SPR_TTMR_IP, 1);
      report_interrupt(INT_TICK);
    }
 
    if (ttmr & SPR_TTMR_M == 1) {
      /* Mode 01: Restart timer.  */
      ttcr = 0;
      mtspr(SPR_TTCR, ttcr);
      return;
    } else if (ttmr & SPR_TTMR_M == 2) {
      /* Mode 10: Temporarly stop timer.  */
      tt_stopped = 1;
      return;
    }
  }
  if (!tt_stopped)
    ttcr++;
  mtspr(SPR_TTCR, ttcr);
}
 

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