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[/] [or1k/] [tags/] [nog_patch_47/] [or1ksim/] [cpu/] [or1k/] [sprs.c] - Rev 123
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/* sprs.c -- Simulation of OR1K special-purpose registers Copyright (C) 1999 Damjan Lampret, lampret@opencores.org This file is part of OpenRISC 1000 Architectural Simulator. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ #include <stdlib.h> #include <stdio.h> #include <string.h> #include "arch.h" #include "sprs.h" extern int cont_run; static sprword sprs[MAX_SPRS]; int temp_disable_except = 0; /* Set a specific SPR with a value. */ void mtspr(int regno, sprword value) { int ofs = regno % MAX_SPRS_PER_GRP; if (regno == 0x1234) printf("MTSPR(0x1234, %x);\n", value); regno /= MAX_SPRS_PER_GRP; regno += ofs; /* printf("mtspr(%x, %x)\n", regno, value); */ if (regno < MAX_SPRS) sprs[regno] = value; else { printf("\nABORT: write out of SPR range\n"); cont_run = 0; } return; } /* Get a specific SPR. */ sprword mfspr(int regno) { int ofs = regno % MAX_SPRS_PER_GRP; regno /= MAX_SPRS_PER_GRP; regno += ofs; /* MM: l.rfe, for example, temporarly disables exceptions. We will make it appear as SR bit is set. */ /*if (regno == SPR_SR && temp_disable_except > 0) return sprs[regno] | SPR_SR_EXR;*/ /* printf("mfspr(%x)%x\n", regno, sprs[regno]); */ if (regno < MAX_SPRS) return sprs[regno]; else { printf("\nABORT: read out of SPR range\n"); cont_run = 0; } return 0; } /* Set a specific bit from SPR. LSB in a word is numbered zero. */ void setsprbit(int regno, int bitnum, unsigned long bitvalue) { sprword mask; sprword regvalue = mfspr(regno); mask = ~(1 << bitnum); mtspr(regno, (regvalue & mask) | ((bitvalue & 0x1) << bitnum)); return; } /* Get a specific bit from SPR. */ int getsprbit(int regno, int bitnum) { sprword regvalue = mfspr(regno); return (regvalue >> bitnum) & 0x1; } /* Set specific SPR bit(s) identified by mask. */ void setsprbits(int regno, unsigned long mask, unsigned long value) { sprword regvalue = mfspr(regno); sprword shifted = 0x0; int m, v = 0; /* m counts bits in valuemask */ /* v counts bits in value */ for (m = 0; m < 32; m++) if ((mask >> m) & 0x1) { shifted |= ((value >> v) & 0x1) << m; v++; } /* printf("oldvalue %x setsprbits(%x, %x, %x) shifted %x", regvalue, regno, mask, value, shifted); */ mtspr(regno, (regvalue & ~mask) | shifted); return; } /* Get specific SPR bit(s) identified by mask. */ unsigned long getsprbits(int regno, unsigned long mask) { sprword regvalue = mfspr(regno); sprword shifted = 0x0; int m, v = 0; /* m counts bits in valuemask */ /* v counts bits in regvalue */ for (m = 0; m < 32; m++) if ((mask >> m) & 0x1) { shifted |= ((regvalue >> m) & 0x1) << v; v++; } return shifted; } /* Show status of important SPRs. */ void sprs_status() { printf("VR : 0x%.8x UPR : 0x%.8x\n", mfspr(SPR_VR), mfspr(SPR_UPR)); printf("SR : 0x%.8x\n", mfspr(SPR_SR)); printf("MACLO: 0x%.8x MACHI: 0x%.8x\n", mfspr(SPR_MACLO), mfspr(SPR_MACHI)); printf("EPCR0: 0x%.8x EPCR1: 0x%.8x\n", mfspr(SPR_EPCR_BASE), mfspr(SPR_EPCR_BASE+1)); printf("EEAR0: 0x%.8x EEAR1: 0x%.8x\n", mfspr(SPR_EEAR_BASE), mfspr(SPR_EEAR_BASE+1)); printf("ESR0 : 0x%.8x ESR1 : 0x%.8x\n", mfspr(SPR_ESR_BASE), mfspr(SPR_ESR_BASE+1)); }
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