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[/] [or1k/] [tags/] [nog_patch_47/] [or1ksim/] [cpu/] [or1k/] [sprs.c] - Rev 28
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/* sprs.c -- Simulation of OR1K special-purpose registers Copyright (C) 1999 Damjan Lampret, lampret@opencores.org This file is part of OpenRISC 1000 Architectural Simulator. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ /* Most of the general OR1K architecture simulation (not specific to OR32 or OR16 ISA) is done in this file. */ #include <stdlib.h> #include <stdio.h> #include <string.h> #include "arch.h" #include "sprs.h" extern int cont_run; sprword sprs[MAX_SPRS]; /* Set a specific SPR with a value. */ void mtsr(int regno, sprword value) { if (regno < MAX_SPRS) sprs[regno] = value; else { printf("\nEXCEPTION: write out of SPR's range\n"); cont_run = 0; } return; } /* Get a specific SPR. */ sprword mfsr(int regno) { if (regno < MAX_SPRS) return sprs[regno]; else { printf("\nEXCEPTION: read out of SPR's range\n"); cont_run = 0; } return 0; } /* Set a specific bit from SPR. LSB in a word is numbered zero. */ void setsprbit(int regno, int bitnum, unsigned long bitvalue) { sprword mask; sprword regvalue = mfsr(regno); mask = ~(1 << bitnum); mtsr(regno, (regvalue & mask) | ((bitvalue & 0x1) << bitnum)); return; } /* Get a specific bit from SPR. */ int getsprbit(int regno, int bitnum) { sprword regvalue = mfsr(regno); return (regvalue >> bitnum) & 0x1; }
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