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[/] [or1k/] [tags/] [nog_patch_61/] [or1ksim/] [sim-config.c] - Rev 196
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/* config.c -- Simulator configuration Copyright (C) 1999 Damjan Lampret, lampret@opencores.org This file is part of OpenRISC 1000 Architectural Simulator. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ /* Simulator configuration. Eventually this one will be a lot bigger. */ #include <stdio.h> #include "sim-config.h" #include "abstract.h" #include "spr_defs.h" struct config config; void init_defconfig() { unsigned long val; memset(&config, 0, sizeof(config)); config.dc.tagtype = NONE/*VIRTUAL*/; config.ic.tagtype = NONE/*VIRTUAL*/; config.bp.bpb_sim = 1; config.bp.btic_sim = 1; config.clkcycle_ns = 4; /* 4 for 4ns (250MHz) */ config.uarts[0].rxfile = "/tmp/uart0.rx"; config.uarts[0].txfile = "/tmp/uart0.tx"; config.uarts[0].baseaddr = 0x80000000; config.uarts[0].jitter = -1; /* Async behavior */ config.ram.startaddr = MEMORY_START; config.ram.endaddr = MEMORY_START + MEMORY_LEN; config.simdebug = 0; config.profile = 0; config.iprompt = 0; config.dependstats = 1; config.dependency = 1; config.history = 1; config.superscalar = 1; config.slp = 1; config.profile = 0; mtspr(SPR_VR, SPR_VR_VER & 0x1200); mtspr(SPR_CPUCFGR, SPR_CPUCFGR_OB32S); mtspr(SPR_DMMUCFGR, (0 << 5) | (7 << 2) | (1 << 0)); mtspr(SPR_IMMUCFGR, (0 << 5) | (7 << 2) | (1 << 0)); mtspr(SPR_DCCFGR, (0 << 5) | (7 << 2) | (1 << 0)); mtspr(SPR_ICCFGR, (0 << 5) | (7 << 2) | (1 << 0)); mtspr(SPR_DCFGR, SPR_DCFGR_WPCI); mtspr(SPR_PCCFGR, 1); val = SPR_UPR_UP | SPR_UPR_DCP | SPR_UPR_ICP | SPR_UPR_DMP | SPR_UPR_IMP | SPR_UPR_OB32P | SPR_UPR_DUP | SPR_UPR_PICP | SPR_UPR_PMP | SPR_UPR_TTP; mtspr(SPR_UPR, val); } int parse_args(int argc, char *argv[]) { unsigned long val; argv++; argc--; while (argc) { if (argc && (*argv[0] != '-')) { config.filename = argv[0]; argc--; argv++; } else if (strncmp(*argv, "-loadmem",8) == 0) { /* (CZ) */ MemoryBlock** block = &config.memory; int address = 0; if(!--argc) return 1; if(argv[0][8] == '@') { char *s; address = strtol(address,&s,0); if(*s) return 1; } else if(argv[0][8]) return 1; while(*block) block = &(*block)->next; *block = (MemoryBlock*)malloc(sizeof(MemoryBlock)); memset(*block,0,sizeof(MemoryBlock)); (*block)->address = address; (*block)->file = *(++argv); argv++; argc--; } else if (strcmp(*argv, "-initmem") == 0) { /* (CZ) */ char *pattern,*s; if(!--argc) return 1; pattern = *(++argv); if(!strcmp(pattern,"random")) config.random_mem = 1; else { val = strtol(pattern,&s,0); if(*s) return 1; config.pattern_mem = val; } } else if (strcmp(*argv, "-nosrv") == 0) { /* (CZ) */ config.inhibit_server = 1; argv++; argc--; } else if (strcmp(*argv, "-srv") == 0) { /* (CZ) */ char *s; if(!--argc) return 1; config.server_port = strtol(*(++argv),&s,10); if(*s) return 1; argv++; argc--; } else if (strcmp(*argv, "-i") == 0) { config.iprompt = 1; argv++; argc--; } else if (strcmp(*argv, "-v") == 0) { version(); exit(0); } else if (strcmp(*argv, "-bpb") == 0) { config.bp.bpb_sim = 0; argv++; argc--; } else if (strcmp(*argv, "-hazards") == 0) { config.dependstats = 0; config.dependency = 0; argv++; argc--; } else if (strcmp(*argv, "-history") == 0) { config.history = 0; argv++; argc--; } else if (strcmp(*argv, "-superscalar") == 0) { config.superscalar = 0; argv++; argc--; } else if (strcmp(*argv, "-fast") == 0) { config.superscalar = 0; config.history = 0; config.dependstats = 0; config.dependency = 0; config.bp.bpb_sim = 0; config.bp.btic_sim = 0; config.slp = 0; argv++; argc--; } else if (strcmp(*argv, "-btic") == 0) { config.bp.btic_sim = 0; argv++; argc--; } else if (strcmp(*argv, "-upr") == 0) { argv++; argc--; val = strtoul(*argv, NULL, 0); mtspr(SPR_UPR, val); argv++; argc--; } else if (strcmp(*argv, "-ver") == 0) { argv++; argc--; val = strtoul(*argv, NULL, 0); setsprbits(SPR_VR, SPR_VR_VER, val); argv++; argc--; } else if (strcmp(*argv, "-rev") == 0) { argv++; argc--; val = strtoul(*argv, NULL, 0); setsprbits(SPR_VR, SPR_VR_REV, val); argv++; argc--; } else if (strcmp(*argv, "-profile") == 0) { config.profile = 1; argv++; argc--; } else { printf("Unknown option: %s\n", *argv); return 1; } } if (!argc) return 0; return 0; } void print_config() { printf("Machine initialization...\n"); if (testsprbits(SPR_UPR, SPR_UPR_DCP)) printf("Data cache tag: %s\n", config.dc.tagtype == VIRTUAL ? "virtual" : "physical"); else printf("No data cache.\n"); if (testsprbits(SPR_UPR, SPR_UPR_ICP)) printf("Insn cache tag: %s\n", config.ic.tagtype == VIRTUAL ? "virtual" : "physical"); else printf("No instruction cache.\n"); if (config.bp.bpb_sim) printf("BPB simulation on.\n"); else printf("BPB simulation off.\n"); if (config.bp.btic_sim) printf("BTIC simulation on.\n"); else printf("BTIC simulation off.\n"); printf("Clock cycle: %d ns\n", config.clkcycle_ns); printf("RAM: 0x%x to ", config.ram.startaddr); printf("0x%x (", config.ram.endaddr); printf("%d KB)\n\n", (config.ram.endaddr - config.ram.startaddr) / 1024); if (config.simdebug) printf("simdebug on, "); else printf("simdebug off, "); if (config.iprompt) printf("interactive prompt on\n"); else printf("interactive prompt off\n"); }
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