URL
https://opencores.org/ocsvn/or1k/or1k/trunk
Subversion Repositories or1k
[/] [or1k/] [tags/] [nog_patch_61/] [or1ksim/] [sim-config.h] - Rev 230
Go to most recent revision | Compare with Previous | Blame | View Log
/* config.h -- Simulator configuration header file Copyright (C) 1999 Damjan Lampret, lampret@opencores.org This file is part of OpenRISC 1000 Architectural Simulator. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ #include <stdio.h> /* Simulator configuration macros. Eventually this one will be a lot bigger. */ #define NR_UARTS 4 /* Number of UARTs simulated */ #define NR_DMAS 1 /* Number of DMA controllers */ #define NONE 0 #define VIRTUAL 1 #define PHYSICAL 2 typedef struct MemoryBlock { int address; char* file; struct MemoryBlock* next; } MemoryBlock; struct config { struct { int tagtype; } dc; struct { int tagtype; } ic; struct { int bpb_sim; int btic_sim; } bp; /* Branch prediction */ int clkcycle_ns; /* Clock cycle in nanoseconds */ struct { char *rxfile; /* File for RX */ char *txfile; /* File for TX (required) */ int jitter; /* CZ 250801 - in msecs...time to block */ unsigned long baseaddr; /* Naturally aligned base address */ } uarts[NR_UARTS]; struct { unsigned long baseaddr; unsigned irq; } dmas[NR_DMAS]; int simdebug; /* Simulator debugging */ int profile; /* Is profiler running */ FILE *fprof; /* profiler file */ int iprompt; /* Interactive prompt */ int dependstats;/* Calculation of dependency statistics */ int dependency; /* Calculation of dependency (implied by dependstats) */ int history; /* Instruction stream history remembered by the simulator */ int superscalar;/* "Superscalar" simulation */ int slp; int inhibit_server; /* Don't start up the JTAG proxy server */ int server_port; /* A user specified port number for services */ int pattern_mem; /* A user specified memory initialization pattern */ int random_mem; /* Initialize the memory with random values */ MemoryBlock* memory; /* New style memory initializer file (CZ) */ char* filename; /* Original Command Simulator file (CZ) */ }; extern struct config config;
Go to most recent revision | Compare with Previous | Blame | View Log