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[/] [or1k/] [tags/] [rel_1/] [or1200/] [sim/] [run.sh] - Rev 1765
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verilog +overwrite +turbo+3 ../rtl/verilog/*.v ../bench/wb_sram.v ../bench/tb_or1200.v ../bench/monitor.v +incdir+../bench +incdir+../rtl/verilog \ ../lib/art_hssp_512x19/art_hssp_512x19.v ../lib/art_hssp_2048x8/art_hssp_2048x8.v ../lib/art_hdsp_2048x32/art_hdsp_2048x32.v \ ../lib/art_hsdp_32x32/art_hsdp_32x32.v ../lib/art_hssp_128x34/art_hssp_128x34.v