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/* ethernet.h -- Definition of types and structures for Ethernet MAC
   Copyright (C) 2001 Erez Volk, erez@mailandnews.comopencores.org
 
   This file is part of OpenRISC 1000 Architectural Simulator.
 
   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 2 of the License, or
   (at your option) any later version.
 
   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.
 
   You should have received a copy of the GNU General Public License
   along with this program; if not, write to the Free Software
   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
 
/* Exported function prototypes */
void eth_reset( void );
void eth_clock( void );
void eth_status( void );
 
 
/* Address space required by one Ethernet MAC */
#define ETH_ADDR_SPACE 0x1000
 
/* Relative Register Addresses */
#define ETH_MODER	    (4 * 0x00)
#define ETH_INT_SOURCE	(4 * 0x01)
#define ETH_INT_MASK	(4 * 0x02)
#define ETH_IPGT	    (4 * 0x03)
#define ETH_IPGR1	    (4 * 0x04)
#define ETH_IPGR2	    (4 * 0x05)
#define ETH_PACKETLEN	(4 * 0x06)
#define ETH_COLLCONF	(4 * 0x07)
#define ETH_RX_BD_ADR	(4 * 0x08)
#define ETH_CTRLMODER	(4 * 0x09)
#define ETH_MIIMODER	(4 * 0x0A)
#define ETH_MIICOMMAND	(4 * 0x0B)
#define ETH_MIIADDRESS	(4 * 0x0C)
#define ETH_MIITX_DATA	(4 * 0x0D)
#define ETH_MIIRX_DATA	(4 * 0x0E)
#define ETH_MIISTATUS	(4 * 0x0F)
#define ETH_MAC_ADDR0	(4 * 0x10)
#define ETH_MAC_ADDR1	(4 * 0x11)
 
/* Where BD's are stored */
#define ETH_BD_BASE        0x400
#define ETH_BD_COUNT       0x100
#define ETH_BD_SPACE       (4 * ETH_BD_COUNT)
 
/* Where to point DMA to transmit/receive */
#define ETH_DMA_RX_TX      0x800
 
/* Field definitions for MODER */
#define ETH_MODER_DMAEN_OFFSET     17
#define ETH_MODER_RECSMALL_OFFSET  16
#define ETH_MODER_PAD_OFFSET       15
#define ETH_MODER_HUGEN_OFFSET     14
#define ETH_MODER_CRCEN_OFFSET     13
#define ETH_MODER_DLYCRCEN_OFFSET  12
#define ETH_MODER_RST_OFFSET       11
#define ETH_MODER_FULLD_OFFSET     10
#define ETH_MODER_EXDFREN_OFFSET   9
#define ETH_MODER_NOBCKOF_OFFSET   8
#define ETH_MODER_LOOPBCK_OFFSET   7
#define ETH_MODER_PRO_OFFSET       5
#define ETH_MODER_IAM_OFFSET       4
#define ETH_MODER_BRO_OFFSET       3
#define ETH_MODER_NOPRE_OFFSET     2
#define ETH_MODER_TXEN_OFFSET      1
#define ETH_MODER_RXEN_OFFSET      0
 
/* Field definitions for INT_SOURCE */
#define ETH_INT_SOURCE_BUSY_OFFSET 4
#define ETH_INT_SOURCE_RXF_OFFSET  3
#define ETH_INT_SOURCE_RXB_OFFSET  2
#define ETH_INT_SOURCE_TXE_OFFSET  1
#define ETH_INT_SOURCE_TXB_OFFSET  0
 
/* Field definitions for INT_MASK */
#define ETH_INT_MASK_BUSY_M_OFFSET 4
#define ETH_INT_MASK_RXF_M_OFFSET  3
#define ETH_INT_MASK_RXB_M_OFFSET  2
#define ETH_INT_MASK_TXE_M_OFFSET  1
#define ETH_INT_MASK_TXB_M_OFFSET  0
 
/* Field definitions for PACKETLEN */
#define ETH_PACKETLEN_MINFL_OFFSET 16
#define ETH_PACKETLEN_MINFL_WIDTH  16
#define ETH_PACKETLEN_MAXFL_OFFSET 0
#define ETH_PACKETLEN_MAXFL_WIDTH  16
 
/* Field definitions for TX buffer descriptors */
#define ETH_TX_BD_LENGTH_OFFSET        16
#define ETH_TX_BD_LENGTH_WIDTH         16
#define ETH_TX_BD_READY_OFFSET         15
#define ETH_TX_BD_INTERRUPT_OFFSET     14
#define ETH_TX_BD_WRAP_OFFSET          13
#define ETH_TX_BD_PAD_OFFSET           12
#define ETH_TX_BD_CRC_OFFSET           11
#define ETH_TX_BD_LAST_OFFSET          10
#define ETH_TX_BD_PAUSE_OFFSET         9
#define ETH_TX_BD_DEFER_OFFSET         8
#define ETH_TX_BD_COLLISION_OFFSET     7
#define ETH_TX_BD_RETRANSMIT_OFFSET    6
#define ETH_TX_BD_UNDERRUN_OFFSET      5
#define ETH_TX_BD_NO_CARRIER_OFFSET    4
#define ETH_TX_BD_RETRY_OFFSET         0
#define ETH_TX_BD_RETRY_WIDTH          4
 
/* Field definitions for RX buffer descriptors */
#define ETH_RX_BD_LENGTH_OFFSET        16
#define ETH_RX_BD_LENGTH_WIDTH         16
#define ETH_RX_BD_EMPTY_OFFSET         15
#define ETH_RX_BD_INTERRUPT_OFFSET     14
#define ETH_RX_BD_WRAP_OFFSET          13
#define ETH_RX_BD_LAST_OFFSET          10
#define ETH_RX_BD_PAUSE_OFFSET         9
#define ETH_RX_BD_DEFER_OFFSET         8
#define ETH_RX_BD_COLLISION_OFFSET     7
#define ETH_RX_BD_RETRANSMIT_OFFSET    6
#define ETH_RX_BD_UNDERRUN_OFFSET      5
#define ETH_RX_BD_NO_CARRIER_OFFSET    4
#define ETH_RX_BD_RETRY_OFFSET         0
#define ETH_RX_BD_RETRY_WIDTH          4
 
 
 
/* Implementatino of Ethernet MAC Registers and State */
struct eth_device 
{
  /* Base address in memory */
  unsigned long baseaddr;
 
  /* Which Ethernet MAC is this? */
  unsigned eth_number;
 
  /* Which DMA controller is this MAC connected to */
  unsigned dma;
	unsigned tx_channel;
	unsigned rx_channel;
 
  /* RX and TX file names and handles */
  const char *rxfile, *txfile;
	int txfd;
	int rxfd;
	off_t loopback_offset;
 
	/* Current TX state */
	struct 
	{
		unsigned long bd_index;
		unsigned long bd;
		unsigned working, waiting_for_ack, error;
		unsigned packet_length;
		unsigned minimum_length, maximum_length;
		unsigned crc;
		unsigned bytes_left, bytes_sent;
	} tx;
 
	/* Current RX state */
	struct 
	{
		unsigned long bd_index;
		unsigned long bd;
		int fd;
		off_t *offset;
		unsigned working, error, waiting_for_ack;
		unsigned packet_length, bytes_read, bytes_left;
	} rx;
 
  /* Visible registers */
  struct
  {
    unsigned long moder;
    unsigned long int_source;
    unsigned long int_mask;
    unsigned long ipgt;
    unsigned long ipgr1;
    unsigned long ipgr2;
    unsigned long packetlen;
    unsigned long collconf;
    unsigned long rx_bd_adr;
    unsigned long controlmoder;
    unsigned long miimoder;
    unsigned long miicommand;
    unsigned long miiaddress;
    unsigned long miitx_data;
    unsigned long miirx_data;
    unsigned long miistatus;
    unsigned long mac_addr0;
    unsigned long mac_addr1;
 
		/* Buffer descriptors */
		unsigned long bd_ram[ETH_BD_SPACE / 4];
  } regs;
};