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[/] [or1k/] [tags/] [tn_m001/] [or1ksim/] [testbench/] [eth.cfg] - Rev 549
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section memory
memory_table_file = "defaultmem.cfg"
/*random_seed = 12345
type = random*/
pattern = 0x00
type = unknown /* Fastest */
nmemories = 2
device 0
name = "RAM"
ce = 0
baseaddr = 0x00000000
size = 0x00200000
delayr = 10
delayw = -1
enddevice
device 1
name = "FLASH"
ce = 1
baseaddr = 0x40000000
size = 0x00200000
delayr = 2
delayw = 4
enddevice
end
section sim
verbose = 0
debug = 4
end
section dma
ndmas = 1
device 0
baseaddr = 0x90000000
irq = 4
enddevice
end
section ethernet
nethernets = 1
device 0
baseaddr = 0x88000000
dma = 0
tx_channel = 0
rx_channel = 1
rxfile = "eth0.rx"
txfile = "eth0.tx"
enddevice
end
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